loadpatents
Patent applications and USPTO patent grants for Wu; Jing-Chang.The latest application filed is for "semiconductor device".
Patent | Date |
---|---|
Method for fabricating strained-silicon CMOS transistors Grant 7,618,856 - Ting , et al. November 17, 2 | 2009-11-17 |
Semiconductor Device App 20090224328 - Ting; Shyh-Fann ;   et al. | 2009-09-10 |
Fabricating method of semiconductor structure Grant 7,524,716 - Ting , et al. April 28, 2 | 2009-04-28 |
Semiconductor structure and fabricating method thereof Grant 7,288,822 - Ting , et al. October 30, 2 | 2007-10-30 |
Semiconductor Structure And Fabricating Method Thereof App 20070235770 - Ting; Shyh-Fann ;   et al. | 2007-10-11 |
Semiconductor Structure And Fabricating Method Thereof App 20070238241 - Ting; Shyh-Fann ;   et al. | 2007-10-11 |
Method For Fabricating Strained-silicon Cmos Transistors App 20070128783 - Ting; Shyh-Fann ;   et al. | 2007-06-07 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.