Patent applications and USPTO patent grants for Wu; David M..The latest application filed is for "scan architecture and design methodology yielding significant reduction in scan area and power overhead".
Patent | Date |
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Scan architecture and design methodology yielding significant reduction in scan area and power overhead Grant 8,321,730 - Jaber , et al. November 27, 2 | 2012-11-27 |
Scan Architecture And Design Methodology Yielding Significant Reduction In Scan Area And Power Overhead App 20110161759 - Jaber; Talal K. ;   et al. | 2011-06-30 |
Common test logic for multiple operation modes Grant 7,734,972 - Jaber , et al. June 8, 2 | 2010-06-08 |
Common test logic for multiple operation modes App 20090187799 - Jaber; Talal ;   et al. | 2009-07-23 |
Method and apparatus for testing a memory array Grant 7,370,249 - Bao , et al. May 6, 2 | 2008-05-06 |
Flexible scan architecture App 20070168767 - Jaber; Talal K. ;   et al. | 2007-07-19 |
Flexible scan architecture Grant 7,216,274 - Jaber , et al. May 8, 2 | 2007-05-08 |
Method and apparatus for testing a memory array App 20050283688 - Bao, Zhuoyu ;   et al. | 2005-12-22 |
Flexible scan architecture App 20040267504 - Jaber, Talal K. ;   et al. | 2004-12-30 |
Scan cell systems and methods Grant 6,815,977 - Sabbavarapu , et al. November 9, 2 | 2004-11-09 |
Weighted random pattern test using pre-stored weights Grant 6,795,948 - Lin , et al. September 21, 2 | 2004-09-21 |
Scan cell systems and methods App 20040119501 - Sabbavarapu, Anil K. ;   et al. | 2004-06-24 |
Method and apparatus for providing rotational burn-in stress testing Grant 6,683,467 - Keshavarzi , et al. January 27, 2 | 2004-01-27 |
Weighted random pattern test using pre-stored weights App 20030074615 - Lin, Chih-Jen ;   et al. | 2003-04-17 |
Method and system for modeling the behavior of a circuit Grant 5,920,489 - Dibrino , et al. July 6, 1 | 1999-07-06 |
By-pass boundary scan design Grant 5,042,034 - Correale, Jr. , et al. August 20, 1 | 1991-08-20 |
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