Wu; Chau-Chin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wu; Chau-Chin.The latest application filed is for "cam circuit with separate memory and logic operating voltages".

Company Profile

0.30.3

Wu; Chau-Chin - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,859,876 - Lien , et al. December 28, 2	2010-12-28
CAM arrays having CAM cells therein with match line and low match line connections and methods of operating same Grant RE41,351 - Lien , et al. May 25, 2	2010-05-25
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,545,660 - Lien , et al. June 9, 2	2009-06-09
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,522,438 - Lien , et al. April 21, 2	2009-04-21
System and method for integrated circuit charge recycling Grant 7,414,460 - Lien , et al. August 19, 2	2008-08-19
Reduced size dual-port SRAM cell Grant 7,359,275 - Wu April 15, 2	2008-04-15
Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same Grant 7,304,875 - Lien , et al. December 4, 2	2007-12-04
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,248,492 - Lien , et al. July 24, 2	2007-07-24
Method and apparatus for CAM with reduced cross-coupling interference Grant 7,187,571 - Lien , et al. March 6, 2	2007-03-06
Content addressable memory (CAM) arrays and cells having low power requirements Grant RE39,227 - Lien , et al. August 8, 2	2006-08-08
Content addressable memory (CAM) devices having scalable multiple match detection circuits therein Grant 6,924,994 - Lin , et al. August 2, 2	2005-08-02
Content addressable memory (CAM) devices having error detection and correction control circuits therein and methods of operating same Grant 6,879,504 - Lien , et al. April 12, 2	2005-04-12
Multiple match detection logic and gates for content addressable memory (CAM) devices Grant 6,859,378 - Lin , et al. February 22, 2	2005-02-22
Content addressable memory (CAM) devices that utilize multi-port CAM cells and control logic to support multiple overlapping search cycles that are asynchronously timed relative to each other Grant 6,781,857 - Lien , et al. August 24, 2	2004-08-24
ESD protection circuit Grant 6,724,601 - Lien , et al. April 20, 2	2004-04-20
Cam Circuit With Separate Memory And Logic Operating Voltages App 20030227789 - Lien, Chuen-Der ; et al.	2003-12-11
Cam circuit with separate memory and logic operating voltages Grant 6,661,687 - Lien , et al. December 9, 2	2003-12-09
Content addressable memory (CAM) devices having reliable column redundancy characteristics and methods of operating same Grant 6,657,878 - Lien , et al. December 2, 2	2003-12-02
Content addressable memory (CAM) devices having reliable column redundancy characteristics and methods of operating same App 20030165073 - Lien, Chuen-Der ; et al.	2003-09-04
DRAM circuit with separate refresh memory Grant 6,563,754 - Lien , et al. May 13, 2	2003-05-13
Increasing priority encoder speed using the most significant bit of a priority address Grant 6,505,271 - Lien , et al. January 7, 2	2003-01-07
Pipelining a content addressable memory cell array for low-power operation Grant 6,470,418 - Lien , et al. October 22, 2	2002-10-22
ESD protection circuit App 20020131221 - Lien, Chuen-Der ; et al.	2002-09-19
DRAM-based CAM cell using 3T or 4T DRAM cells Grant 6,421,265 - Lien , et al. July 16, 2	2002-07-16
Ternary CAM cell with DRAM mask circuit Grant 6,400,593 - Lien , et al. June 4, 2	2002-06-04
Level-shifting signal buffers that support higher voltage power supplies using lower voltage MOS technology Grant 6,388,499 - Tien , et al. May 14, 2	2002-05-14
Ternary CAM array Grant 6,262,907 - Lien , et al. July 17, 2	2001-07-17
Five-transistor SRAM cell Grant 6,205,049 - Lien , et al. March 20, 2	2001-03-20
Low-power content addressable memory cell Grant 6,128,207 - Lien , et al. October 3, 2	2000-10-03
Six transistor content addressable memory cell Grant 6,101,116 - Lien , et al. August 8, 2	2000-08-08
Synchronous sense amplifier with temperature and voltage compensated translator Grant 6,037,807 - Wu , et al. March 14, 2	2000-03-14
Circuit for compensating for variations in both temperature and supply voltage Grant 5,994,945 - Wu , et al. November 30, 1	1999-11-30
Circuits and methods for amplification of electrical signals Grant 5,341,333 - Tien , et al. August 23, 1	1994-08-23

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