loadpatents
name:-0.023935079574585
name:-0.014343976974487
name:-0.00051093101501465
Wristers; Derick Patent Filings

Wristers; Derick

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wristers; Derick.The latest application filed is for "composite spacer liner for improved transistor performance".

Company Profile
0.13.2
  • Wristers; Derick - Bee Cave TX
  • Wristers; Derick - Bee Caves TX
  • Wristers; Derick - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of manufacturing a semiconductor component
Grant 7,208,383 - Weintraub , et al. April 24, 2
2007-04-24
Composite spacer liner for improved transistor performance
Grant 6,949,436 - Buller , et al. September 27, 2
2005-09-27
Composite spacer liner for improved transistor performance
App 20040259343 - Buller, James F. ;   et al.
2004-12-23
Method for manufacturing a semiconductor component having an early halo implant
Grant 6,833,307 - Wristers , et al. December 21, 2
2004-12-21
Semiconductor component and method of manufacture
App 20040087094 - Wristers, Derick ;   et al.
2004-05-06
Semiconductor structure having elevated salicided source/drain regions and metal gate electrode on nitride/oxide dielectric
Grant 6,674,135 - Cheek , et al. January 6, 2
2004-01-06
Semiconductor structure having a metal gate electrode and elevated salicided source/drain regions and a method for manufacture
Grant 6,638,829 - Cheek , et al. October 28, 2
2003-10-28
Process for reliable ultrathin oxynitride formation
Grant 6,245,689 - Hao , et al. June 12, 2
2001-06-12
Method of forming a metal gate electrode using replaced polysilicon structure
Grant 6,162,694 - Cheek , et al. December 19, 2
2000-12-19
Reduced boron diffusion by use of a pre-anneal
Grant 6,159,812 - Cheek , et al. December 12, 2
2000-12-12
Semiconductor device having gate electrode with a sidewall air gap
Grant 6,104,077 - Gardner , et al. August 15, 2
2000-08-15
Oxide liner for high reliability with reduced encroachment of the source/drain region
Grant 6,093,611 - Gardner , et al. July 25, 2
2000-07-25
Formation of shortage protection region
Grant 5,977,600 - Wristers , et al. November 2, 1
1999-11-02
Method of processing a semiconductor wafer for controlling drive current
Grant 5,943,550 - Fulford, Jr. , et al. August 24, 1
1999-08-24
Ultrathin oxynitride structure and process for VLSI applications
Grant 5,939,763 - Hao , et al. August 17, 1
1999-08-17

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