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Multi-mode memory module and memory component
Grant 11,379,392 - Ware , et al. July 5, 2 | 2022-07-05 |
Floating body DRAM with reduced access energy
Grant 11,309,015 - Ware , et al. April 19, 2 | 2022-04-19 |
Floating Body Dram With Reduced Access Energy
App 20210035623 - Ware; Frederick A. ; et al. | 2021-02-04 |
Multi-Mode Memory Module and Memory Component
App 20210004337 - Ware; Frederick A. ; et al. | 2021-01-07 |
Multi-mode memory module and memory component
Grant 10,762,010 - Ware , et al. Sep | 2020-09-01 |
Floating body DRAM with reduced access energy
Grant 10,762,948 - Ware , et al. Sep | 2020-09-01 |
Floating Body Dram With Reduced Access Energy
App 20180166120 - Ware; Frederick A. ; et al. | 2018-06-14 |
Multi-Mode Memory Module and Memory Component
App 20180137067 - Ware; Frederick A. ; et al. | 2018-05-17 |
Method and data processing system for microprocessor communication in a cluster-based multi-processor system
Grant 7,818,364 - Arimilli , et al. October 19, 2 | 2010-10-19 |
Memory System having Spare Memory Devices Attached to a Local Interface Bus
App 20100162037 - Maule; Warren Edward ; et al. | 2010-06-24 |
Method and data processing system for processor-to-processor communication in a clustered multi-processor system
Grant 7,734,877 - Arimilli , et al. June 8, 2 | 2010-06-08 |
Method, processing unit and data processing system for microprocessor communication in a multi-processor system
Grant 7,698,373 - Arimilli , et al. April 13, 2 | 2010-04-13 |
Method and data processing system for microprocessor communication using a processor interconnect in a multi-processor system
Grant 7,493,417 - Arimilli , et al. February 17, 2 | 2009-02-17 |
Chained cache coherency states for sequential non-homogeneous access to a cache line with outstanding data response
Grant 7,409,504 - Rajamony , et al. August 5, 2 | 2008-08-05 |
Method And Data Processing System For Processor-to-processor Communication In A Clustered Multi-processor System
App 20080155231 - Arimilli; Ravi Kumar ; et al. | 2008-06-26 |
Method, Processing Unit And Data Processing System For Microprocessor Communication In A Multi-processor System
App 20080109816 - ARIMILLI; RAVI KUMAR ; et al. | 2008-05-08 |
Chained cache coherency states for sequential homogeneous access to a cache line with outstanding data response
Grant 7,370,155 - Rajamony , et al. May 6, 2 | 2008-05-06 |
Method And Data Processing System For Microprocessor Communication In A Cluster-based Multi-processor System
App 20080091918 - Arimilli; Ravi Kumar ; et al. | 2008-04-17 |
Method and data processing system for microprocessor communication in a cluster-based multi-processor system
Grant 7,359,932 - Arimilli , et al. April 15, 2 | 2008-04-15 |
Method and data processing system for microprocessor communication in a cluster-based multi-processor wireless network
Grant 7,360,067 - Arimilli , et al. April 15, 2 | 2008-04-15 |
Method, processing unit and data processing system for microprocessor communication in a multi-processor system
Grant 7,356,568 - Arimilli , et al. April 8, 2 | 2008-04-08 |
Modified-invalid cache state to reduce cache-to-cache data transfer operations for speculatively-issued full cache line writes
Grant 7,284,097 - Dodson , et al. October 16, 2 | 2007-10-16 |
Method to preserve ordering of read and write operations in a DMA system by delaying read access
Grant 7,243,194 - Daly, Jr. , et al. July 10, 2 | 2007-07-10 |
Chained cache coherency states for sequential homogeneous access to a cache line with outstanding data response
App 20070083717 - Rajamony; Ramakrishnan ; et al. | 2007-04-12 |
Chained cache coherency states for sequential non-homogeneous access to a cache line with outstanding data response
App 20070083716 - Rajamony; Ramakrishnan ; et al. | 2007-04-12 |
Localized cache block flush instruction
Grant 7,194,587 - McCalpin , et al. March 20, 2 | 2007-03-20 |
Method to preserve ordering of read and write operations in a DMA system by delaying read access
App 20060179185 - Daly; George William JR. ; et al. | 2006-08-10 |
Data processing system having no system memory
Grant 7,017,024 - Arimilli , et al. March 21, 2 | 2006-03-21 |
Bi-directional stack in a linear memory array
Grant 6,934,825 - Farago , et al. August 23, 2 | 2005-08-23 |
Method and system of managing virtualized physical memory in a data processing system
Grant 6,920,521 - Arimilli , et al. July 19, 2 | 2005-07-19 |
Method and system of managing virtualized physical memory in a memory controller and processor system
Grant 6,907,494 - Arimilli , et al. June 14, 2 | 2005-06-14 |
Method and system of managing virtualized physical memory in a multi-processor system
Grant 6,904,490 - Arimilli , et al. June 7, 2 | 2005-06-07 |
Modified-invalid cache state to reduce cache-to-cache data transfer operations for speculatively-issued full cache line writes
App 20050071573 - Dodson, John Steven ; et al. | 2005-03-31 |
Data processing system having a physically addressed cache of disk memory
App 20050055528 - Arimilli, Ravi Kumar ; et al. | 2005-03-10 |
Localized cache block flush instruction
App 20040215896 - McCalpin, John David ; et al. | 2004-10-28 |
Verifying cumulative ordering of memory instructions
Grant 6,795,878 - Brown , et al. September 21, 2 | 2004-09-21 |
Verification of global coherence in a multi-node NUMA system
Grant 6,785,773 - Farago , et al. August 31, 2 | 2004-08-31 |
Method and data processing system for microprocessor communication in a cluster-based multi-processor wireless network
App 20040117598 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Hardware managed virtual-to-physical address translation mechanism
App 20040117587 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Interrupt mechanism for a data processing system having hardware managed paging of disk data
App 20040117589 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Method and data processing system for microprocessor communication using a processor interconnect in a multi-processor system
App 20040117510 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Method and data processing system for microprocessor communication in a cluster-based multi-processor system
App 20040117511 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Aliasing support for a data processing system having no system memory
App 20040117590 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Data processing system having no system memory
App 20040117591 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Method, processing unit and data processing system for microprocessor communication in a multi-processor system
App 20040117603 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Apparatus for influencing process scheduling in a data processing system capable of utilizing a virtual memory processing scheme
App 20040117583 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Access request for a data processing system having no system memory
App 20040117588 - Arimilli, Ravi Kumar ; et al. | 2004-06-17 |
Method and system of managing virtualized physical memory in a data processing system
App 20040073742 - Arimilli, Ravi Kumar ; et al. | 2004-04-15 |
Method and system of managing virtualized physical memory in a memory controller and processor system
App 20040073765 - Arimilli, Ravi Kumar ; et al. | 2004-04-15 |
Method and system of managing virtualized physical memory in a multi-processor system
App 20040073743 - Arimilli, Ravi Kumar ; et al. | 2004-04-15 |
Split bi-directional stack in a linear memory array
Grant 6,643,662 - Farago , et al. November 4, 2 | 2003-11-04 |
Proportionally growing stack in a linear memory array
Grant 6,629,228 - Farago , et al. September 30, 2 | 2003-09-30 |
Verification of global coherence in a multi-node NUMA system
App 20020144185 - Farago, Steven Robert ; et al. | 2002-10-03 |
Verifying cumulative ordering
App 20020112122 - Brown, Aaron Ches ; et al. | 2002-08-15 |
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