loadpatents
Patent applications and USPTO patent grants for Wood; Dustin P..The latest application filed is for "integrated circuit package substrate".
Patent | Date |
---|---|
Integrated circuit package substrate Grant 10,522,455 - Manusharow , et al. Dec | 2019-12-31 |
Integrated Circuit Package Substrate App 20190164881 - MANUSHAROW; Mathew J. ;   et al. | 2019-05-30 |
Integrated circuit package substrate Grant 10,242,942 - Manusharow , et al. | 2019-03-26 |
Integrated Circuit Package Substrate App 20170154842 - MANUSHAROW; Mathew J. ;   et al. | 2017-06-01 |
iTFC with optimized C(T) Grant 7,755,165 - Palanduz , et al. July 13, 2 | 2010-07-13 |
Integrated circuit packages, systems, and methods Grant 7,687,905 - Stone , et al. March 30, 2 | 2010-03-30 |
Integrated circuit package with improved power signal connection Grant 7,667,320 - Wood , et al. February 23, 2 | 2010-02-23 |
iTFC with optimized C(T) Grant 7,656,644 - Palanduz , et al. February 2, 2 | 2010-02-02 |
Interconnect shunt used for current distribution and reliability redundancy Grant 7,524,754 - Bohr , et al. April 28, 2 | 2009-04-28 |
Array capacitors for broadband decoupling applications Grant 7,495,336 - Auernheimer , et al. February 24, 2 | 2009-02-24 |
Array capacitors with voids to enable a full-grid socket Grant 7,463,492 - Radhakrishnan , et al. December 9, 2 | 2008-12-09 |
Integrated Circuit Packages, Systems, And Methods App 20080142962 - Stone; Brent S. ;   et al. | 2008-06-19 |
Integrated Circuit Package With Improved Power Signal Connection App 20080136010 - Wood; Dustin P. ;   et al. | 2008-06-12 |
iTFC with optimized C(T) Grant 7,375,412 - Palanduz , et al. May 20, 2 | 2008-05-20 |
iTFC WITH OPTIMIZED C(T) App 20080106844 - Palanduz; Cengiz A. ;   et al. | 2008-05-08 |
iTFC WITH OPTIMIZED C(T) App 20080106848 - Palanduz; Cengiz A. ;   et al. | 2008-05-08 |
Array capacitor with resistive structure Grant 7,365,428 - Auernheimer , et al. April 29, 2 | 2008-04-29 |
Array capacitor for decoupling multiple voltage rails Grant 7,355,836 - Radhakrishnan , et al. April 8, 2 | 2008-04-08 |
Integrated circuit package with improved power signal connection Grant 7,348,214 - Wood , et al. March 25, 2 | 2008-03-25 |
Integrated circuit packages, systems, and methods Grant 7,339,263 - Stone , et al. March 4, 2 | 2008-03-04 |
Selective plating of package terminals Grant 7,321,172 - Wood , et al. January 22, 2 | 2008-01-22 |
Array capacitors with voids to enable a full-grid socket App 20070253142 - Radhakrishnan; Kaladhar ;   et al. | 2007-11-01 |
Array capacitors with voids to enable a full-grid socket Grant 7,265,995 - Radhakrishnan , et al. September 4, 2 | 2007-09-04 |
Chip package with degassing holes Grant 7,243,423 - Wood July 17, 2 | 2007-07-17 |
Array capacitors for broadband decoupling applications, and methods of operating same App 20070152301 - Auernheimer; Joel A. ;   et al. | 2007-07-05 |
Integrated circuit package with improved power signal connection App 20070114675 - Wood; Dustin P. ;   et al. | 2007-05-24 |
Interconnect shunt used for current distribution and reliability redundancy Grant 7,208,830 - Bohr , et al. April 24, 2 | 2007-04-24 |
Selective plating of package terminals Grant 7,186,645 - Wood , et al. March 6, 2 | 2007-03-06 |
Integrated circuit package with improved power signal connection Grant 7,183,644 - Wood , et al. February 27, 2 | 2007-02-27 |
Array capacitor with IC contacts and applications Grant 7,173,804 - Radhakrishnan , et al. February 6, 2 | 2007-02-06 |
Package substrate for integrated circuit and method of making the substrate Grant 7,152,313 - Wood , et al. December 26, 2 | 2006-12-26 |
Array capacitor for decoupling multiple voltage rails App 20060274479 - Radhakrishnan; Kaladhar ;   et al. | 2006-12-07 |
Thermal solution with isolation layer App 20060256531 - Sauciuc; Ioan ;   et al. | 2006-11-16 |
Interconnect shunt used for current distribution and reliability redundancy App 20060097375 - Bohr; Mark ;   et al. | 2006-05-11 |
Array capacitor with resistive structure App 20060087030 - Auernheimer; Joel A. ;   et al. | 2006-04-27 |
Array capacitor with IC contacts and applications App 20060067030 - Radhakrishnan; Kaladhar ;   et al. | 2006-03-30 |
Selective plating of package terminals App 20060006535 - Wood; Dustin P. ;   et al. | 2006-01-12 |
Interconnect shunt used for current distribution and reliability redundancy App 20060001178 - Bohr; Mark ;   et al. | 2006-01-05 |
Integrated circuit packages, systems, and methods App 20050285243 - Stone, Brent S. ;   et al. | 2005-12-29 |
Integrated circuit packaging architecture Grant 6,979,891 - Wood , et al. December 27, 2 | 2005-12-27 |
Integrated circuit package with improved power signal connection App 20050236707 - Wood, Dustin P. ;   et al. | 2005-10-27 |
Array capacitors with voids to enable a full-grid socket App 20050141206 - Radhakrishnan, Kaladhar ;   et al. | 2005-06-30 |
Package substrate for integrated circuit and method of making the substrate App 20050111207 - Wood, Dustin P. ;   et al. | 2005-05-26 |
Selective plating of package terminals App 20050112880 - Wood, Dustin P. ;   et al. | 2005-05-26 |
Chip package with degassing holes App 20050077077 - Wood, Dustin P. | 2005-04-14 |
Integrated circuit packaging architecture App 20050051889 - Wood, Dustin P. ;   et al. | 2005-03-10 |
Chip package with degassing holes Grant 6,831,233 - Wood December 14, 2 | 2004-12-14 |
Multilayer capacitor with multiple plates per layer Grant 6,819,543 - Vieweg , et al. November 16, 2 | 2004-11-16 |
Multilayer Capacitor With Multiple Plates Per Layer App 20040125540 - Vieweg, Raymond A. ;   et al. | 2004-07-01 |
Chip package with degassing holes App 20010008313 - Wood, Dustin P. | 2001-07-19 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.