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Patent applications and USPTO patent grants for Wong; Mei Hsu.The latest application filed is for "function safety and fault management modeling at electrical system level (esl)".
Patent | Date |
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Function Safety And Fault Management Modeling At Electrical System Level (esl) App 20220292237 - TING; Kai-Yuan ;   et al. | 2022-09-15 |
Semiconductor Device and Method of Manufacture App 20220037288 - Zhou; Haohua ;   et al. | 2022-02-03 |
Integrated Impedance Measurement Device and Impedance Measurement Method Thereof App 20210373057 - Zhou; Haohua ;   et al. | 2021-12-02 |
System on Chip (SOC) Current Profile Model for Integrated Voltage Regulator (IVR) Co-design App 20210224445 - Zhou; Haohua ;   et al. | 2021-07-22 |
System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design Grant 10,970,439 - Zhou , et al. April 6, 2 | 2021-04-06 |
System on Chip (SOC) Current Profile Model for Integrated Voltage Regulator (IVR) Co-design App 20200175129 - Zhou; Haohua ;   et al. | 2020-06-04 |
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