Wong; Hoong Shing

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wong; Hoong Shing.The latest application filed is for "methods for doping high-k metal gates for tuning threshold voltages".

Company Profile

1.11.14

Wong; Hoong Shing - Hsinchu TW
Wong; Hoong Shing - Clifton Park NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods for Doping High-K Metal Gates for Tuning Threshold Voltages App 20220285161 - Yu; Kuo-Feng ; et al.	2022-09-08
Methods for doping high-k metal gates for tuning threshold voltages Grant 11,342,188 - Yu , et al. May 24, 2	2022-05-24
Methods for Doping High-K Metal Gates for Tuning Threshold Voltages App 20210082706 - Yu; Kuo-Feng ; et al.	2021-03-18
FinFET with isolated source and drain Grant 10,128,333 - Wong , et al. November 13, 2	2018-11-13
Finfet With Isolated Source And Drain App 20170288016 - WONG; Hoong Shing ; et al.	2017-10-05
FinFET with active region shaped structures and channel separation Grant 9,337,340 - Chi , et al. May 10, 2	2016-05-10
Semiconductor Structures With Coplanar Recessed Gate Layers And Fabrication Methods App 20160049495 - TREVINO; Kristina ; et al.	2016-02-18
Semiconductor structures with coplanar recessed gate layers and fabrication methods Grant 9,252,238 - Trevino , et al. February 2, 2	2016-02-02
Replacement Low-k Spacer App 20150311083 - XIAO; Changyong ; et al.	2015-10-29
Replacement low-K spacer Grant 9,159,567 - Xiao , et al. October 13, 2	2015-10-13
Methods of manufacturing integrated circuits having FinFET structures with epitaxially formed source/drain regions Grant 9,153,496 - Wong , et al. October 6, 2	2015-10-06
Integrated circuits having replacement metal gates with improved threshold voltage performance and methods for fabricating the same Grant 9,147,680 - Trevino , et al. September 29, 2	2015-09-29
Finfet With Isolated Source And Drain App 20150221726 - Wong; Hoong Shing ; et al.	2015-08-06
Finfet With Active Region Shaped Structures And Channel Separation App 20150187947 - CHI; Min-Hwa ; et al.	2015-07-02
FinFET with active region shaped structures and channel separation Grant 9,006,066 - Chi , et al. April 14, 2	2015-04-14
Methods Of Manufacturing Integrated Circuits Having Finfet Structures With Epitaxially Formed Source/drain Regions App 20150099336 - Wong; Hoong Shing ; et al.	2015-04-09
Methods of manufacturing integrated circuits having FinFET structures with epitaxially formed source/drain regions Grant 8,946,029 - Wong , et al. February 3, 2	2015-02-03
Methods for fabricating integrated circuits utilizing silicon nitride layers Grant 8,940,650 - Cao , et al. January 27, 2	2015-01-27
Integrated Circuits Having Replacement Metal Gates With Improved Threshold Voltage Performance And Methods For Fabricating The Same App 20150021694 - Trevino; Kristina ; et al.	2015-01-22
Wrap around stressor formation Grant 8,906,768 - Wong , et al. December 9, 2	2014-12-09
Finfet With Active Region Shaped Structures And Channel Separation App 20140319615 - CHI; Min-Hwa ; et al.	2014-10-30
Wrap Around Stressor Formation App 20140264489 - WONG; Hoong Shing ; et al.	2014-09-18
Methods For Fabricating Integrated Circuits Utilizing Silicon Nitride Layers App 20140256141 - Cao; Huy ; et al.	2014-09-11
Integrated Circuits And Methods For Fabricating Integrated Circuits With Salicide Contacts On Non-planar Source/drain Regions App 20140131777 - Wong; Hoong Shing ; et al.	2014-05-15
Methods Of Manufacturing Integrated Circuits Having Finfet Structures With Epitaxially Formed Source/drain Regions App 20140134814 - Wong; Hoong Shing ; et al.	2014-05-15

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