loadpatents
name:-0.00040602684020996
name:-0.054286956787109
name:-0.00052714347839355
Wong; Hee Patent Filings

Wong; Hee

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wong; Hee.The latest application filed is for "sliding error sampler (ses) for latency reduction in the pwm path".

Company Profile
0.45.0
  • Wong; Hee - San Jose CA
  • Wong; Hee - San Hose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Sliding error sampler (SES) for latency reduction in the PWM path
Grant 8,238,414 - Wong August 7, 2
2012-08-07
Multiplexed proportional-integral-derivative filter architecture (Mux-PID) for control-loop applications
Grant 7,979,483 - Wong July 12, 2
2011-07-12
Gain control coding within proportional-integral-derivative filters for control-loop applications
Grant 7,930,334 - Wong April 19, 2
2011-04-19
Fine-resolution edge-extending pulse width modulator
Grant 7,791,387 - Wong September 7, 2
2010-09-07
Selectively activated multi-subcarrier (SAMS) radio transceiver measuring techniques
Grant 7,769,372 - Wong August 3, 2
2010-08-03
Radio frequency mixer and method of operation
Grant 7,636,562 - Wong December 22, 2
2009-12-22
Fast adapting filter
Grant 7,616,052 - Ju , et al. November 10, 2
2009-11-10
Sliding error sampler (SES) for latency reduction in the ADC path
Grant 7,561,084 - Wong July 14, 2
2009-07-14
Digital dead-time controller for pulse width modulators
Grant 7,554,372 - Wong June 30, 2
2009-06-30
Harmonic rejection gated-switching mixer
Grant 7,483,683 - Wong , et al. January 27, 2
2009-01-27
Cascading-synchronous mixer and method of operation
Grant 7,477,886 - Wong January 13, 2
2009-01-13
Phase-alternating mixer with alias and harmonic rejection
Grant 7,336,938 - Wong February 26, 2
2008-02-26
Harmonic rejection gated-switching mixer
Grant 7,299,025 - Wong , et al. November 20, 2
2007-11-20
Capacitor load mixer with PAM function
Grant 7,286,810 - Wong , et al. October 23, 2
2007-10-23
Analog-to-digital converters for control loop applications
Grant 7,250,884 - Wong July 31, 2
2007-07-31
Dither scheme using pulse-density modulation (dither PDM)
Grant 7,227,476 - Wong June 5, 2
2007-06-05
Double sideband-intermediate frequency radio receiver architecture
Grant 7,212,588 - Wong , et al. May 1, 2
2007-05-01
Minimum gate delay edge counter
Grant 7,197,104 - Cheung , et al. March 27, 2
2007-03-27
Chopper-direct-conversion (CDC) radio architecture
Grant 7,177,609 - Wong February 13, 2
2007-02-13
Harmonic rejection mixer and method of operation
Grant 7,130,604 - Wong , et al. October 31, 2
2006-10-31
Down/up-conversion mixer for direct conversion radios
Grant 6,959,179 - Wong , et al. October 25, 2
2005-10-25
Cascading-synchronous mixer and method of operation
Grant 6,876,844 - Wong April 5, 2
2005-04-05
Method and apparatus for addressing beat patterns in an integrated video display system
Grant 6,873,318 - Wong March 29, 2
2005-03-29
Radio frequency mixer and method of operation
Grant 6,839,551 - Wong January 4, 2
2005-01-04
Method and apparatus with enhanced jitter transfer characteristics in a phase-locked loop system
Grant 6,697,445 - Wong February 24, 2
2004-02-24
Multi-dimensional differential signaling (MDDS)
Grant 6,452,420 - Wong September 17, 2
2002-09-17
High speed data receiver
Grant 5,940,442 - Wong , et al. August 17, 1
1999-08-17
Multiple stage adaptive equalizer
Grant 5,841,810 - Wong , et al. November 24, 1
1998-11-24
Phase error processor circuit with a comparator input swapping technique
Grant 5,477,177 - Wong , et al. December 19, 1
1995-12-19
Digital serial loop filter for high speed control systems
Grant 5,351,275 - Wong , et al. September 27, 1
1994-09-27
Phase detector for very high frequency clock and data recovery circuits
Grant 5,329,559 - Wong , et al. July 12, 1
1994-07-12
Digital testing techniques for very high frequency phase-locked loops
Grant 5,295,079 - Wong , et al. March 15, 1
1994-03-15
Phase error processor
Grant 5,239,561 - Wong , et al. August 24, 1
1993-08-24
Digital signed phase-to-frequency converter for very high frequency phase locked loops
Grant 5,224,125 - Wong , et al. June 29, 1
1993-06-29
Frequency shift keying modulator
Grant 5,187,721 - Wong February 16, 1
1993-02-16
Digital phase locked loop utilizing a multi-bit phase error input for control of a stepped clock generator
Grant 5,056,054 - Wong , et al. October 8, 1
1991-10-08
Differential phase shift keying modulator
Grant 5,027,372 - Wong June 25, 1
1991-06-25
High resolution sample clock generator with deglitcher
Grant 5,018,169 - Wong , et al. May 21, 1
1991-05-21
Auto-threshold/adaptive equalizer
Grant 4,873,700 - Wong October 10, 1
1989-10-10
Quotient phase-shift processor for digital phase-locked-loops
Grant 4,862,485 - Guinea , et al. August 29, 1
1989-08-29
Digital FSK demodulator
Grant 4,825,452 - Wong April 25, 1
1989-04-25
Second-order carrier/symbol sychronizer
Grant 4,787,096 - Wong November 22, 1
1988-11-22
Digital PLL decoder
Grant 4,584,695 - Wong , et al. April 22, 1
1986-04-22
Coherent data communications technique
Grant 4,577,335 - Wong , et al. March 18, 1
1986-03-18
Digital color modulator
Grant 4,390,893 - Russell , et al. June 28, 1
1983-06-28

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