loadpatents
name:-0.022212982177734
name:-0.015037059783936
name:-0.00061297416687012
Wong; Dale Patent Filings

Wong; Dale

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wong; Dale.The latest application filed is for "hierarchical storage architecture for reconfigurable logic configurations".

Company Profile
0.12.11
  • Wong; Dale - San Francisco CA
  • Wong; Dale - San Franciso CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Hierarchical storage architecture for reconfigurable logic configurations
Grant 7,502,920 - Phillips , et al. March 10, 2
2009-03-10
Field programmable gate array core cell with efficient logic packing
Grant 7,009,421 - Pugh , et al. March 7, 2
2006-03-07
Hierarchical storage architecture for reconfigurable logic configurations
App 20050204122 - Phillips, Christopher E. ;   et al.
2005-09-15
Interconnection network for a field programmable gate array
Grant 6,940,308 - Wong September 6, 2
2005-09-06
Programmable interface for field programmable gate array cores
Grant 6,888,371 - Wong May 3, 2
2005-05-03
Field programmable gate array core cell with efficient logic packing
App 20050040849 - Pugh, Daniel J. ;   et al.
2005-02-24
Field programmable gate array core cell with efficient logic packing
Grant 6,801,052 - Pugh , et al. October 5, 2
2004-10-05
Interconnection network for a field programmable gate array
App 20040150422 - Wong, Dale
2004-08-05
Via programmable gate array interconnect architecture
App 20040105207 - Spaderna, Dieter ;   et al.
2004-06-03
Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic
Grant 6,708,325 - Cooke , et al. March 16, 2
2004-03-16
Interconnection network for a field programmable gate array
Grant 6,693,456 - Wong February 17, 2
2004-02-17
Interface architecture for embedded field programmable gate array cores
App 20030212940 - Wong, Dale
2003-11-13
Programmable interface for field programmable gate array cores
App 20030098710 - Wong, Dale
2003-05-29
Field programmable gate array core cell with efficient logic packing
App 20030085733 - Pugh, Daniel J. ;   et al.
2003-05-08
Hierarchical mux based integrated circuit interconnect architecture for scalability and automatic generation
App 20030039262 - Wong, Dale ;   et al.
2003-02-27
Method For Compiling High Level Programming Languages
App 20030014743 - COOKE, LAURENCE H. ;   et al.
2003-01-16
Secure intellectual property for a generated field programmable gate array
App 20020150252 - Wong, Dale
2002-10-17
Interconnection network for a Field Progammable Gate Array
App 20020113619 - Wong, Dale
2002-08-22
Reconfigurable logic for table lookup
Grant 6,389,579 - Phillips , et al. May 14, 2
2002-05-14
Behavioral silicon construct architecture and mapping
Grant 6,298,472 - Phillips , et al. October 2, 2
2001-10-02
Integrated processor and programmable data path chip for reconfigurable computing
Grant 6,282,627 - Wong , et al. August 28, 2
2001-08-28
Integrated processor and programmable data path chip for reconfigurable computing
Grant 5,970,254 - Cooke , et al. October 19, 1
1999-10-19
Method for compiling high level programming languages into an integrated processor with reconfigurable logic
Grant 5,966,534 - Cooke , et al. October 12, 1
1999-10-12

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed