loadpatents
name:-0.010953187942505
name:-0.0077159404754639
name:-0.0011241436004639
Wittke; Michael Patent Filings

Wittke; Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wittke; Michael.The latest application filed is for "on-chip logic to log failures during production testing and enable debugging for failure diagnosis".

Company Profile
0.8.9
  • Wittke; Michael - Pinneberg DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
High speed clock control
Grant 8,448,008 - Hapke , et al. May 21, 2
2013-05-21
On-chip logic to log failures during production testing and enable debugging for failure diagnosis
Grant 8,423,845 - Hapke , et al. April 16, 2
2013-04-16
Testable integrated circuit and test data generation method
Grant 8,250,420 - Hapke , et al. August 21, 2
2012-08-21
Deterministic logic built-in self-test stimuli generation
Grant 8,112,686 - Hapke , et al. February 7, 2
2012-02-07
On-chip logic to support compressed X-masking for BIST
Grant 8,103,925 - Hapke , et al. January 24, 2
2012-01-24
On-Chip Logic To Log Failures During Production Testing And Enable Debugging For Failure Diagnosis
App 20110047425 - Hapke; Friedrich ;   et al.
2011-02-24
Circuit arrangement and method of testing an application circuit provided in said circuit arrangement
Grant 7,870,453 - Wittke , et al. January 11, 2
2011-01-11
On-Chip Logic To Support Compressed X-Masking For BIST
App 20100299567 - Hapke; Friedrich ;   et al.
2010-11-25
Deterministic Logic Built-In Self-Test Stimuli Generation
App 20100275075 - Hapke; Friedrich ;   et al.
2010-10-28
On-Chip Logic To Support In-Field Or Post-Tape-Out X-Masking In BIST Designs
App 20100253381 - Hapke; Friedrich ;   et al.
2010-10-07
High Speed Clock Control
App 20100251045 - HAPKE; Friedrich ;   et al.
2010-09-30
Cell-Aware Fault Model Creation And Pattern Generation
App 20100229061 - HAPKE; Friedrich ;   et al.
2010-09-09
Testable Integrated Circuit And Test Data Generation Method
App 20100117658 - Hapke; Friedrich ;   et al.
2010-05-13
Circuit Arrangement and Method of Testing an Application Circuit Provided in Said Circuit Arrangement
App 20080195907 - Wittke; Michael ;   et al.
2008-08-14
Method of testing an integrated circuit by simulation
App 20030128022 - Souef, Laurent ;   et al.
2003-07-10

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