| Patent | Date |
|---|
System for scheduling threads for execution
Grant 10,691,490 - Witek , et al. | 2020-06-23 |
Floating-point arithmetic operation range exception override circuit
Grant 10,564,931 - Witek , et al. Feb | 2020-02-18 |
System For Scheduling Threads For Execution
App 20200012518 - Witek; Richard T. ; et al. | 2020-01-09 |
System and method for implementing finite impulse response filter in an audio processor
Grant 10,243,581 - Witek , et al. | 2019-03-26 |
Non-contacting inductive interconnects
Grant 9,997,495 - Burger , et al. June 12, 2 | 2018-06-12 |
Non-contacting Inductive Interconnects
App 20160181227 - Burger; Douglas C. ; et al. | 2016-06-23 |
Integrating display controller into low power processor
Grant 7,750,912 - Polzin , et al. July 6, 2 | 2010-07-06 |
Integrated circuit with a hibernate mode and method therefor
Grant 7,395,443 - Kromer , et al. July 1, 2 | 2008-07-01 |
Integrating display controller into low power processor
App 20070115290 - Polzin; R. Stephen ; et al. | 2007-05-24 |
Method and apparatus for lowering bus clock frequency in a complex integrated data processing system
Grant 7,093,153 - Witek , et al. August 15, 2 | 2006-08-15 |
Branch performance in high speed processor
Grant 6,167,509 - Sites , et al. December 26, 2 | 2000-12-26 |
Branch prediction in high-performance processor
Grant 6,076,158 - Sites , et al. June 13, 2 | 2000-06-13 |
Prefetch instruction for improving performance in reduced instruction set processor
Grant 5,778,423 - Sites , et al. July 7, 1 | 1998-07-07 |
System and method for preserving instruction state-atomicity for translated program
Grant 5,636,366 - Robinson , et al. June 3, 1 | 1997-06-03 |
Byte-compare operation for high-performance processor
Grant 5,568,624 - Sites , et al. October 22, 1 | 1996-10-22 |
Method and apparatus for eliminating branches using conditional move instructions
Grant 5,469,551 - Sites , et al. November 21, 1 | 1995-11-21 |
Virtual to physical address translation scheme with granularity hint for identifying subsequent pages to be accessed
Grant 5,454,091 - Sites , et al. September 26, 1 | 1995-09-26 |
Pipeline utilizing an integral cache for transferring data to and from a register
Grant 5,430,888 - Witek , et al. July 4, 1 | 1995-07-04 |
In-register data manipulation for unaligned byte write using data shift in reduced instruction set processor
Grant 5,410,682 - Sites , et al. April 25, 1 | 1995-04-25 |
In-register data manipulation using data shift in reduced instruction set processor
Grant 5,367,705 - Sites , et al. November 22, 1 | 1994-11-22 |
Method for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructions
Grant 5,341,482 - Cutler , et al. August 23, 1 | 1994-08-23 |
Translation buffer for virtual machines with address space match
Grant 5,319,760 - Mason , et al. June 7, 1 | 1994-06-07 |
Apparatus and method for main memory unit protection using access and fault logic signals
Grant 5,317,717 - Cutler , et al. May 31, 1 | 1994-05-31 |
Apparatus and method for data induced condition signalling
Grant 5,278,840 - Cutler , et al. January 11, 1 | 1994-01-11 |
Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption
Grant 5,218,712 - Cutler , et al. June 8, 1 | 1993-06-08 |
Ensuring data integrity by locked-load and conditional-store operations in a multiprocessor system
Grant 5,193,167 - Sites , et al. March 9, 1 | 1993-03-09 |
Pipeline having an integral cache which processes cache misses and loads data in parallel
Grant 5,148,536 - Witek , et al. September 15, 1 | 1992-09-15 |
Apparatus and method for recovering from missing page faults in vector data processing operations
Grant 5,063,497 - Cutler , et al. November 5, 1 | 1991-11-05 |
Load/store with write-intent for write-back caches
Grant 5,043,886 - Witek , et al. August 27, 1 | 1991-08-27 |
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