Wise; Richard

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wise; Richard.The latest application filed is for "tin oxide films in semiconductor device manufacturing".

Company Profile

17.53.60

Wise; Richard - Los Gatos CA
Wise; Richard - Los Altos CA
Wise; Richard - Newburgh NY US
Wise; Richard - Hopewell Junction NY
Wise; Richard - New Windsor NY
Wise; Richard - Newbugh NY
Wise; Richard - Beacon NY
Wise; Richard - Monett MO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Tin Oxide Films In Semiconductor Device Manufacturing App 20220270877 - Yu; Jengyi ; et al.	2022-08-25
Atomic Layer Etch And Selective Deposition Process For Extreme Ultraviolet Lithography Resist Improvement App 20220216050 - Yu; Jengyi ; et al.	2022-07-07
Tin oxide mandrels in patterning Grant 11,355,353 - Yu , et al. June 7, 2	2022-06-07
Tin Oxide Films In Semiconductor Device Manufacturing App 20220165571 - Yu; Jengyi ; et al.	2022-05-26
Tin oxide films in semiconductor device manufacturing Grant 11,322,351 - Yu , et al. May 3, 2	2022-05-03
Eliminating Yield Impact Of Stochastics In Lithography App 20220122846 - Shamma; Nader ; et al.	2022-04-21
Eliminating yield impact of stochastics in lithography Grant 11,257,674 - Shamma , et al. February 22, 2	2022-02-22
Tin Oxide Thin Film Spacers In Semiconductor Device Manufacturing App 20220005694 - Smith; David Charles ; et al.	2022-01-06
Tin oxide thin film spacers in semiconductor device manufacturing Grant 11,183,383 - Smith , et al. November 23, 2	2021-11-23
Tin Oxide Films In Semiconductor Device Manufacturing App 20210265163 - Yu; Jengyi ; et al.	2021-08-26
Tin Oxide Mandrels In Patterning App 20210265173 - Yu; Jengyi ; et al.	2021-08-26
Tin Oxide Thin Film Spacers In Semiconductor Device Manufacturing App 20210242019 - Smith; David Charles ; et al.	2021-08-05
Tin oxide thin film spacers in semiconductor device manufacturing Grant 11,031,245 - Smith , et al. June 8, 2	2021-06-08
Chamfer-less Via Integration Scheme App 20210017643 - Kanakasabapathy; Sivananda Krishnan ; et al.	2021-01-21
Eliminating Yield Impact Of Stochastics In Lithography App 20200402801 - Shamma; Nader ; et al.	2020-12-24
Eliminating yield impact of stochastics in lithography Grant 10,796,912 - Shamma , et al. October 6, 2	2020-10-06
Tin Oxide Thin Film Spacers In Semiconductor Device Manufacturing App 20200219725 - Smith; David Charles ; et al.	2020-07-09
Etching substrates using ALE and selective deposition Grant 10,685,836 - Tan , et al.	2020-06-16
Tin Oxide Films In Semiconductor Device Manufacturing App 20200083044 - Yu; Jengyi ; et al.	2020-03-12
Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework Grant 10,585,347 - Sriraman , et al.	2020-03-10
Method of charge controlled patterning during reactive ion etching Grant 10,573,526 - Mahajan , et al. Feb	2020-02-25
Tin oxide films in semiconductor device manufacturing Grant 10,546,748 - Yu , et al. Ja	2020-01-28
Layout pattern proximity correction through edge placement error prediction Grant 10,534,257 - Tetiker , et al. Ja	2020-01-14
Low roughness EUV lithography Grant 10,438,807 - Wise , et al. O	2019-10-08
Photoresist Design Layout Pattern Proximity Correction Through Fast Edge Placement Error Prediction Via A Physics-based Etch Pro App 20190250501 - Sriraman; Saravanapriyan ; et al.	2019-08-15
Etching Substrates Using Ale And Selective Deposition App 20190244805 - Tan; Samantha ; et al.	2019-08-08
Tin Oxide Mandrels In Patterning App 20190237341 - Yu; Jengyi ; et al.	2019-08-01
Ale smoothness: in and outside semiconductor industry Grant 10,304,659 - Kanarik , et al.	2019-05-28
Etching Metal Oxide Substrates Using Ale And Selective Deposition App 20190131130 - Smith; David Charles ; et al.	2019-05-02
Etching substrates using ale and selective deposition Grant 10,269,566 - Tan , et al.	2019-04-23
Photoresist design layout pattern proximity correction through fast edge placement error prediction via a physics-based etch profile modeling framework Grant 10,197,908 - Sriraman , et al. Fe	2019-02-05
Eliminating Yield Impact Of Stochastics In Lithography App 20180337046 - Shamma; Nader ; et al.	2018-11-22
Design Layout Pattern Proximity Correction Through Edge Placement Error Prediction App 20180314148 - Tetiker; Mehmet Derya ; et al.	2018-11-01
Tin Oxide Films In Semiconductor Device Manufacturing App 20180240667 - Yu; Jengyi ; et al.	2018-08-23
Ale Smoothness: In And Outside Semiconductor Industry App 20180233325 - Kanarik; Keren Jacobs ; et al.	2018-08-16
Low Roughness Euv Lithography App 20180190503 - Wise; Richard ; et al.	2018-07-05
ALE smoothness: in and outside semiconductor industry Grant 9,984,858 - Kanarik , et al. May 29, 2	2018-05-29
Low roughness EUV lithography Grant 9,922,839 - Wise , et al. March 20, 2	2018-03-20
Tin Oxide Thin Film Spacers In Semiconductor Device Manufacturing App 20180012759 - Smith; David Charles ; et al.	2018-01-11
Photoresist Design Layout Pattern Proximity Correction Through Fast Edge Placement Error Prediction Via A Physics-based Etch Profile Modeling Framework App 20170363950 - Sriraman; Saravanapriyan ; et al.	2017-12-21
Tin oxide thin film spacers in semiconductor device manufacturing Grant 9,824,893 - Smith , et al. November 21, 2	2017-11-21
Etching Substrates Using Ale And Selective Deposition App 20170316935 - Tan; Samantha ; et al.	2017-11-02
Method of Charge Controlled Patterning During Reactive ION Etching App 20170076951 - Mahajan; Sunit S. ; et al.	2017-03-16
Ale Smoothness: In And Outside Semiconductor Industry App 20170069462 - Kanarik; Keren Jacobs ; et al.	2017-03-09
Low Roughness Euv Lithography App 20160379824 - Wise; Richard ; et al.	2016-12-29
Method of charge controlled patterning during reactive ion etching Grant 9,496,148 - Mahajan , et al. November 15, 2	2016-11-15
Method for simultaneously forming features of different depths in a semiconductor substrate Grant 8,901,005 - Hichri , et al. December 2, 2	2014-12-02
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials Grant 8,785,281 - Chen , et al. July 22, 2	2014-07-22
Integrated circuit system with reduced polysilicon residue and method of manufacture thereof Grant 8,642,475 - Hu , et al. February 4, 2	2014-02-04
Three dimensional integration and methods of through silicon via creation Grant 8,586,431 - Farooq , et al. November 19, 2	2013-11-19
Method for Simultaneously Forming Features of Different Depths in a Semiconductor Substrate App 20130295773 - Hichri; Habib ; et al.	2013-11-07
Three dimensional integration and methods of through silicon via creation Grant 8,569,154 - Farooq , et al. October 29, 2	2013-10-29
Three Dimensional Integration And Methods Of Through Silicon Via Creation App 20130237054 - Farooq; Mukta G. ; et al.	2013-09-12
Three dimensional integration and methods of through silicon via creation Grant 8,492,252 - Farooq , et al. July 23, 2	2013-07-23
Three dimensional integration and methods of through silicon via creation Grant 8,415,238 - Farooq , et al. April 9, 2	2013-04-09
Three dimensional integration with through silicon vias having multiple diameters Grant 8,399,180 - Farooq , et al. March 19, 2	2013-03-19
Trench Formation In Substrate App 20130043559 - LEE; JUNEDONG ; et al.	2013-02-21
Three Dimensional Integration and Methods of Through Silicon Via Creation App 20120190189 - Farooq; Mukta G. ; et al.	2012-07-26
Three Dimensional Integration and Methods of Through Silicon Via Creation App 20120190196 - Farooq; Mukta G. ; et al.	2012-07-26
Integrated Circuit System With Reduced Polysilicon Residue And Method Of Manufacture Thereof App 20120153474 - Hu; Xiang ; et al.	2012-06-21
Cmos Structure And Method For Fabrication Thereof Using Multiple Crystallographic Orientations And Gate Materials App 20120142181 - Chen; Tze-Chiang ; et al.	2012-06-07
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials Grant 8,158,481 - Chen , et al. April 17, 2	2012-04-17
Thermal gradient control of high aspect ratio etching and deposition processes Grant 8,008,209 - Sievers , et al. August 30, 2	2011-08-30
Method and structure for forming trench DRAM with asymmetric strap Grant 8,008,160 - Cheng , et al. August 30, 2	2011-08-30
Three Dimensional Integration and Methods of Through Silicon Via Creation App 20110171827 - Farooq; Mukta G. ; et al.	2011-07-14
Three Dimensional Integration With Through Silicon Vias Having Multiple Diameters App 20110171582 - Farooq; Mukta G. ; et al.	2011-07-14
Dielectric spacer removal Grant 7,919,379 - Cartier , et al. April 5, 2	2011-04-05
Method for non-selective shallow trench isolation reactive ion etch for patterning hybrid-oriented devices compatible with high-performance highly-integrated logic devices Grant 7,871,893 - Costrini , et al. January 18, 2	2011-01-18
Semiconductor device structure having low and high performance devices of same conductive type on same substrate Grant 7,776,695 - Arnold , et al. August 17, 2	2010-08-17
Method and apparatus for detecting endpoint in a dry etching system by monitoring a superimposed DC current Grant 7,754,615 - Panda , et al. July 13, 2	2010-07-13
Cmos Structure And Method For Fabrication Thereof Using Multiple Crystallographic Orientations And Gate Materials App 20100112800 - Chen; Tze-Chiang ; et al.	2010-05-06
Method of forming gate stack and structure thereof Grant 7,691,701 - Belyansky , et al. April 6, 2	2010-04-06
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials Grant 7,671,421 - Chen , et al. March 2, 2	2010-03-02
Method For Non-selective Shallow Trench Isolation Reactive Ion Etch For Patterning Hybrid-oriented Devices Compatible With High-performance Highly-integrated Logic Devices App 20090189242 - Costrini; Gregory ; et al.	2009-07-30
Method And Structure For Forming Trench Dram With Asymmetric Strap App 20090184392 - Cheng; Kangguo ; et al.	2009-07-23
Thermal Gradient Control of High Aspect Ratio Etching and Deposition Processes App 20090107956 - Sievers; Michael R. ; et al.	2009-04-30
Dielectric Spacer Removal App 20090065817 - Cartier; Eduard A. ; et al.	2009-03-12
Etch Process For Improving Yield Of Dielectric Contacts On Nickel Silicides App 20090008785 - ALLEN; Scott D. ; et al.	2009-01-08
Apparatus and method for shielding a wafer from charged particles during plasma etching Grant 7,438,822 - Yan , et al. October 21, 2	2008-10-21
Etch process for improving yield of dielectric contacts on nickel silicides Grant 7,354,867 - Allen , et al. April 8, 2	2008-04-08
Elevated Temperature Chemical Oxide Removal Module And Process App 20080078743 - Munoz; Andres F. ; et al.	2008-04-03
Method and apparatus for detecting endpoint in a dry etching system by monitoring a superimposed DC current App 20080026488 - Panda; Siddhartha ; et al.	2008-01-31
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials App 20070278586 - Chen; Tze-Chiang ; et al.	2007-12-06
Silicon nitride etching methods Grant 7,288,482 - Panda , et al. October 30, 2	2007-10-30
Endpoint detection for the patterning of layered materials Grant 7,285,775 - Sievers , et al. October 23, 2	2007-10-23
Gas filled reactive atomic force microscope probe Grant 7,278,300 - Sievers , et al. October 9, 2	2007-10-09
Semiconductor Device Structure Having Low And High Performance Devices Of Same Conductive Type On Same Substrate App 20070158753 - Arnold; John C. ; et al.	2007-07-12
Gas Filled Reactive Atomic Force Microscope Probe App 20070068234 - Sievers; Michael R. ; et al.	2007-03-29
Silicon Nitride Etching Methods App 20060252269 - Panda; Siddhartha ; et al.	2006-11-09
Etch Process For Improving Yield Of Dielectric Contacts On Nickel Silicides App 20060172535 - Allen; Scott D. ; et al.	2006-08-03
Endpoint Detection For The Patterning Of Layered Materials App 20060118718 - Sievers; Michael R. ; et al.	2006-06-08
Apparatus and method for shielding a wafer from charged particles during plasma etching App 20060037940 - Yan; Hongwen ; et al.	2006-02-23
Hard mask integrated etch process for patterning of silicon oxide and other dielectric materials Grant 6,869,542 - Desphande , et al. March 22, 2	2005-03-22
Method and system for deep trench silicon etch App 20040256353 - Panda, Siddhartha ; et al.	2004-12-23
Method of improving etch uniformity in deep silicon etching Grant 6,806,200 - Dobuzinsky , et al. October 19, 2	2004-10-19
Hard Mask Integrated Etch Process For Patterning Of Silicon Oxide And Other Dielectric Materials App 20040178169 - Desphande, Sadanand V. ; et al.	2004-09-16
Pre-loaded plasma reactor apparatus and application thereof App 20040129385 - Wise, Richard ; et al.	2004-07-08
Magnetic mirror for preventing wafer edge damage during dry etching App 20040112544 - Yan, Hongwen ; et al.	2004-06-17
Apparatus and method for shielding a wafer from charged particles during plasma etching App 20040110388 - Yan, Hongwen ; et al.	2004-06-10
Method of improving etch uniformity in deep silicon etching App 20040092122 - Dobuzinsky, David ; et al.	2004-05-13
Method to controllably form notched polysilicon gate structures Grant 6,541,320 - Brown , et al. April 1, 2	2003-04-01
Method To Controllably Form Notched Polysilicon Gate Structures App 20030032225 - Brown, Jeffery ; et al.	2003-02-13
Anisotropic nitride etch process with high selectivity to oxide and photoresist layers in a damascene etch scheme Grant 6,461,529 - Boyd , et al. October 8, 2	2002-10-08
Continuous corona discharge ozone generation device Grant 5,525,310 - Decker , et al. June 11, 1	1996-06-11

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