Wirbeleit; Frank

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wirbeleit; Frank.The latest application filed is for "transistor with stress enhanced channel and methods for fabrication".

Company Profile

0.29.31

Wirbeleit; Frank - Dresden N/A DE
Wirbeleit; Frank - Freiberg DE
Wirbeleit; Frank - Wappingers Falls NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for forming a strained transistor by stress memorization based on a stressed implantation mask Grant 9,117,929 - Wirbeleit , et al. August 25, 2	2015-08-25
Transistor with embedded strain-inducing material formed in diamond-shaped cavities based on a pre-amorphization Grant 8,664,056 - Wirbeleit , et al. March 4, 2	2014-03-04
Fabrication of a semiconductor device with extended epitaxial semiconductor regions Grant 8,642,420 - Flachowsky , et al. February 4, 2	2014-02-04
Body controlled double channel transistor and circuits comprising the same Grant 8,507,953 - Wirbeleit August 13, 2	2013-08-13
Transistor With Stress Enhanced Channel And Methods For Fabrication App 20130175610 - Flachowsky; Stefan ; et al.	2013-07-11
Fabrication Of A Semiconductor Device With Extended Epitaxial Semiconductor Regions App 20130052779 - Flachowsky; Stefan ; et al.	2013-02-28
Method for differential spacer removal by wet chemical etch process and device with differential spacer structure Grant 8,298,924 - Wiatr , et al. October 30, 2	2012-10-30
Static RAM cell design and multi-contact regime for connecting double channel transistors Grant 8,264,020 - Wirbeleit September 11, 2	2012-09-11
Static Ram Cell Design And Multi-contact Regime For Connecting Double Channel Transistors App 20120193724 - Wirbeleit; Frank	2012-08-02
Static RAM cell design and multi-contact regime for connecting double channel transistors Grant 8,183,096 - Wirbeleit May 22, 2	2012-05-22
Three-dimensional transistor with double channel configuration Grant 8,164,145 - Wirbeleit April 24, 2	2012-04-24
Semiconductor device comprising isolation trenches inducing different types of strain Grant 8,138,571 - Schwan , et al. March 20, 2	2012-03-20
Transistor With Embedded Strain-Inducing Material Formed in Diamond-Shaped Cavities Based on a Pre-Amorphization App 20110294269 - Wirbeleit; Frank ; et al.	2011-12-01
Method for Forming a Strained Transistor by Stress Memorization Based on a Stressed Implantation Mask App 20110223733 - Wirbeleit; Frank ; et al.	2011-09-15
Method of forming a semiconductor structure comprising a formation of at least one sidewall spacer structure Grant 8,003,460 - Wirbeleit , et al. August 23, 2	2011-08-23
Method for forming a strained transistor by stress memorization based on a stressed implantation mask Grant 7,964,458 - Wirbeleit , et al. June 21, 2	2011-06-21
Body Controlled Double Channel Transistor and Circuits Comprising the Same App 20110080772 - Wirbeleit; Frank	2011-04-07
Method for selectively forming strain in a transistor by a stress memorization technique without adding additional lithography steps Grant 7,906,385 - Lenski , et al. March 15, 2	2011-03-15
Body controlled double channel transistor and circuits comprising the same Grant 7,880,239 - Wirbeleit February 1, 2	2011-02-01
Reduction of memory instability by local adaptation of re-crystallization conditions in a cache area of a semiconductor device Grant 7,811,876 - Scott , et al. October 12, 2	2010-10-12
Inline stress evaluation in microstructure devices Grant 7,787,108 - Wirbeleit August 31, 2	2010-08-31
Method Of Forming A Semiconductor Structure App 20100203698 - Wirbeleit; Frank ; et al.	2010-08-12
Method of forming a semiconductor structure Grant 7,727,827 - Wirbeleit , et al. June 1, 2	2010-06-01
Stressed MOS device Grant 7,696,534 - Peidous , et al. April 13, 2	2010-04-13
Static Ram Cell Design And Multi-contact Regime For Connecting Double Channel Transistors App 20100052069 - Wirbeleit; Frank	2010-03-04
Three-dimensional Transistor With Double Channel Configuration App 20090321835 - Wirbeleit; Frank	2009-12-31
Semiconductor Device Comprising Isolation Trenches Inducing Different Types Of Strain App 20090236667 - Schwan; Christoph ; et al.	2009-09-24
Reduction Of Memory Instability By Local Adaptation Of Re-crystallization Conditions In A Cache Area Of A Semiconductor Device App 20090221115 - Scott; Casey ; et al.	2009-09-03
Method For Selectively Forming Strain In A Transistor By A Stress Memorization Technique Without Adding Additional Lithography Steps App 20090197381 - Lenski; Markus ; et al.	2009-08-06
Body Controlled Double Channel Transistor And Circuits Comprising The Same App 20090194824 - Wirbeleit; Frank	2009-08-06
Formation of transistor having a strained channel region including a performance enhancing material composition utilizing a mask pattern Grant 7,569,437 - Wirbeleit , et al. August 4, 2	2009-08-04
Method of making a semiconductor device comprising isolation trenches inducing different types of strain Grant 7,547,610 - Schwan , et al. June 16, 2	2009-06-16
Technique for transferring strain into a semiconductor region Grant 7,494,906 - Kammler , et al. February 24, 2	2009-02-24
Self-biasing Transistor Structure And An Sram Cell Having Less Than Six Transistors App 20090026521 - Wirbeleit; Frank ; et al.	2009-01-29
Method Of Forming A Semiconductor Structure Comprising A Formation Of At Least One Sidewall Spacer Structure App 20090004799 - Wirbeleit; Frank ; et al.	2009-01-01
Method Of Forming A Semiconductor Structure Comprising An Implantation Of Ions In A Material Layer To Be Etched App 20080299733 - Press; Patrick ; et al.	2008-12-04
Self-biasing transistor structure and an SRAM cell having less than six transistors Grant 7,442,971 - Wirbeleit , et al. October 28, 2	2008-10-28
Stressed Mos Device App 20080258175 - PEIDOUS; Igor ; et al.	2008-10-23
Method Of Forming A Semiconductor Structure App 20080242040 - Wirbeleit; Frank ; et al.	2008-10-02
Method For Differential Spacer Removal By Wet Chemical Etch Process And Device With Differential Spacer Structure App 20080203486 - Wiatr; Maciej ; et al.	2008-08-28
Stressed MOS device and method for its fabrication Grant 7,410,859 - Peidous , et al. August 12, 2	2008-08-12
Inline Stress Evaluation In Microstructure Devices App 20080158541 - Wirbeleit; Frank	2008-07-03
Semiconductor Device Comprising Isolation Trenches Inducing Different Types Of Strain App 20080079085 - Schwan; Christoph ; et al.	2008-04-03
Semiconductor device having nanowire contact structures and method for its fabrication Grant 7,329,606 - Wirbeleit February 12, 2	2008-02-12
Method for fabricating a semiconductor device Grant 7,329,599 - Wirbeleit , et al. February 12, 2	2008-02-12
Methods for fabrication of a stressed MOS device Grant 7,326,601 - Wirbeleit , et al. February 5, 2	2008-02-05
Transistor Having A Strained Channel Region Including A Performance Enhancing Material Composition App 20080023692 - Wirbeleit; Frank ; et al.	2008-01-31
Method For Forming A Strained Transistor By Stress Memorization Based On A Stressed Implantation Mask App 20080026572 - Wirbeleit; Frank ; et al.	2008-01-31
SRAM cells including self-stabilizing transistor structures App 20070176246 - Wirbeleit; Frank ; et al.	2007-08-02
Methods for fabrication of a stressed MOS device App 20070072380 - Wirbeleit; Frank ; et al.	2007-03-29
Technique For Reducing Silicide Non-uniformities By Adapting A Vertical Dopant Profile App 20060270202 - Wirbeleit; Frank ; et al.	2006-11-30
Self-biasing transistor structure and an SRAM cell having less than six transistors App 20060022282 - Wirbeleit; Frank ; et al.	2006-02-02
Technique for evaluating local electrical characteristics in semiconductor devices App 20060022197 - Wirbeleit; Frank ; et al.	2006-02-02
Technique for transferring strain into a semiconductor region App 20060003510 - Kammler; Thorsten ; et al.	2006-01-05

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