Williams; William M.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Williams; William M..The latest application filed is for "integrated circuit with test pad structure and method of testing".
- Williams; William M. - Gilbert AZ
| Patent | Date |
|---|---|
| Integrated circuit with test pad structure and method of testing Grant 6,937,047 - Tran , et al. August 30, 2 | 2005-08-30 |
| Integrated circuit with test pad structure and method of testing App 20050030055 - Tran, Tu-Anh ; et al. | 2005-02-10 |
| Semiconductor wafer contact system and method for contacting a semiconductor wafer Grant 5,773,986 - Thompson , et al. June 30, 1 | 1998-06-30 |
| Process for electrically connecting electrical devices using a conductive anisotropic material Grant 5,661,042 - Fang , et al. August 26, 1 | 1997-08-26 |
| Integrated circuit testing board having constrained thermal expansion characteristics Grant 5,602,491 - Vasquez , et al. February 11, 1 | 1997-02-11 |
| Method for aligning a semiconductor device Grant 5,556,808 - Williams , et al. September 17, 1 | 1996-09-17 |
| Integrated circuit test system Grant 5,469,072 - Williams , et al. November 21, 1 | 1995-11-21 |
| Test contact fixture using flexible circuit tape Grant 5,087,877 - Frentz , et al. February 11, 1 | 1992-02-11 |
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