Williams, III; Gerard R.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Williams, III; Gerard R..The latest application filed is for "systems and methods for coherent power management".
Company Profile
14.51.49
- Williams, III; Gerard R. - Los Altos CA
- Williams, III; Gerard R. - Lost Altos CA US
- Williams, III; Gerard R - Los Altos CA
Patent Activity
| Patent | Date |
|---|---|
| Systems and Methods for Coherent Power Management App 20220137692 - DiBene, II; Joseph T. ; et al. | 2022-05-05 |
| Systems and methods for coherent power management Grant 11,204,636 - DiBene, II , et al. December 21, 2 | 2021-12-21 |
| Computation engine that operates in matrix and vector modes Grant 11,042,373 - Bainville , et al. June 22, 2 | 2021-06-22 |
| Marking valid return targets Grant 10,867,031 - Hughes , et al. December 15, 2 | 2020-12-15 |
| Reduced power operation using stored capacitor energy Grant 10,845,856 - DiBene, II , et al. November 24, 2 | 2020-11-24 |
| Computation engine with extract instructions to minimize memory access Grant 10,831,488 - Bainville , et al. November 10, 2 | 2020-11-10 |
| Computation Engine that Operates in Matrix and Vector Modes App 20200348934 - Bainville; Eric ; et al. | 2020-11-05 |
| Systems and methods for performing memory compression Grant 10,769,065 - Sazegari , et al. Sep | 2020-09-08 |
| Computation engine that operates in matrix and vector modes Grant 10,754,649 - Bainville , et al. A | 2020-08-25 |
| Unified prefetch circuit for multi-level caches Grant 10,621,100 - Meier , et al. | 2020-04-14 |
| Computation Engine that Operates in Matrix and Vector Modes App 20200034145 - Bainville; Eric ; et al. | 2020-01-30 |
| Systems and Methods for Coherent Power Management App 20190346903 - DiBene, II; Joseph T. ; et al. | 2019-11-14 |
| Load/store dependency predictor optimization for replayed loads Grant 10,437,595 - Kanapathipillai , et al. O | 2019-10-08 |
| Systems And Methods For Performing Memory Compression App 20190294541 - Sazegari; Ali ; et al. | 2019-09-26 |
| Systems and methods for coherent power management Grant 10,423,209 - DiBene, II , et al. Sept | 2019-09-24 |
| Processor including multiple dissimilar processor cores that implement different portions of instruction set architecture Grant 10,401,945 - Williamson , et al. Sep | 2019-09-03 |
| Reduced Power Operation Using Stored Capacitor Energy App 20190212796 - DiBene, II; Joseph T. ; et al. | 2019-07-11 |
| Systems and methods for performing memory compression Grant 10,331,558 - Sazegari , et al. | 2019-06-25 |
| Processor including multiple dissimilar processor cores Grant 10,289,191 - Williamson , et al. | 2019-05-14 |
| Reduced power operation using stored capacitor energy Grant 10,281,965 - DiBene, II , et al. | 2019-05-07 |
| Systems And Methods For Performing Memory Compression App 20190034333 - Sazegari; Ali ; et al. | 2019-01-31 |
| Unified prefetch circuit for multi-level caches Grant 10,180,905 - Meier , et al. Ja | 2019-01-15 |
| Systems and Methods for Coherent Power Management App 20180232034 - DiBene, II; Joseph T. ; et al. | 2018-08-16 |
| Reduced Power Operation Using Stored Capacitor Energy App 20180232043 - DiBene, II; Joseph T. ; et al. | 2018-08-16 |
| Processor Including Multiple Dissimilar Processor Cores that Implement Different Portions of Instruction Set Architecture App 20180217659 - Williamson; David J. ; et al. | 2018-08-02 |
| Zero cycle load Grant 9,996,348 - Williams, III , et al. June 12, 2 | 2018-06-12 |
| Processor Including Multiple Dissimilar Processor Cores App 20180129271 - Williamson; David J. ; et al. | 2018-05-10 |
| Processor including multiple dissimilar processor cores that implement different portions of instruction set architecture Grant 9,958,932 - Williamson , et al. May 1, 2 | 2018-05-01 |
| Persistent relocatable reset vector for processor Grant 9,959,120 - de Cesare , et al. May 1, 2 | 2018-05-01 |
| Outer Product Engine App 20180074824 - Sazegari; Ali ; et al. | 2018-03-15 |
| Processor including multiple dissimilar processor cores Grant 9,898,071 - Williamson , et al. February 20, 2 | 2018-02-20 |
| Access permissions modification Grant 9,852,084 - Soderquist , et al. December 26, 2 | 2017-12-26 |
| IT instruction pre-decode Grant 9,626,185 - Sundar , et al. April 18, 2 | 2017-04-18 |
| Load-store dependency predictor PC hashing Grant 9,600,289 - Meier , et al. March 21, 2 | 2017-03-21 |
| Processor and method for implementing barrier operation using speculative and architectural color values Grant 9,582,276 - Meier , et al. February 28, 2 | 2017-02-28 |
| Zero cycle move Grant 9,575,754 - Keller , et al. February 21, 2 | 2017-02-21 |
| Least recently used mechanism for cache line eviction from a cache memory Grant 9,563,575 - Lilly , et al. February 7, 2 | 2017-02-07 |
| Marking Valid Return Targets App 20170024559 - Hughes; Gregory D. ; et al. | 2017-01-26 |
| Optimizing register initialization operations Grant 9,430,243 - Keller , et al. August 30, 2 | 2016-08-30 |
| Global maintenance command protocol in a cache coherent system Grant 9,418,010 - Meier , et al. August 16, 2 | 2016-08-16 |
| Multi-core processor instruction throttling Grant 9,383,806 - Lien , et al. July 5, 2 | 2016-07-05 |
| Processor Including Multiple Dissimilar Processor Cores that Implement Different Portions of Instruction Set Architecture App 20160147290 - Williamson; David J. ; et al. | 2016-05-26 |
| Processor Including Multiple Dissimilar Processor Cores App 20160147289 - Williamson; David J. ; et al. | 2016-05-26 |
| Multi-level dispatch for a superscalar processor Grant 9,336,003 - Mylius , et al. May 10, 2 | 2016-05-10 |
| Instruction set architecture mode dependent sub-size access of register with associated status indication Grant 9,317,285 - Gupta , et al. April 19, 2 | 2016-04-19 |
| Usefulness indication for indirect branch prediction training Grant 9,311,100 - Gupta , et al. April 12, 2 | 2016-04-12 |
| Mechanism for sharing private caches in a SoC Grant 9,280,471 - Gulati , et al. March 8, 2 | 2016-03-08 |
| Least Recently Used Mechanism for Cache Line Eviction from a Cache Memory App 20160055099 - Lilly; Brian P. ; et al. | 2016-02-25 |
| Branch Predictor for Wide Issue, Arbitrarily Aligned Fetch App 20160048395 - Kountanis; Ian D. ; et al. | 2016-02-18 |
| Processing multi-destination instruction in pipeline by splitting for single destination operations stage and merging for opcode execution operations stage Grant 9,223,577 - Mylius , et al. December 29, 2 | 2015-12-29 |
| Branch predictor for wide issue, arbitrarily aligned fetch that can cross cache line boundaries Grant 9,201,658 - Kountanis , et al. December 1, 2 | 2015-12-01 |
| Least recently used mechanism for cache line eviction from a cache memory Grant 9,176,879 - Lilly , et al. November 3, 2 | 2015-11-03 |
| Load-store dependency predictor content management Grant 9,128,725 - Meier , et al. September 8, 2 | 2015-09-08 |
| Flush engine Grant 9,128,857 - Lilly , et al. September 8, 2 | 2015-09-08 |
| Coordinated prefetching based on training in hierarchically cached processors Grant 9,098,418 - Kannan , et al. August 4, 2 | 2015-08-04 |
| Cache policies for uncacheable memory requests Grant 9,043,554 - Lilly , et al. May 26, 2 | 2015-05-26 |
| Mechanism For Sharing Private Caches In A Soc App 20150143044 - Gulati; Manu ; et al. | 2015-05-21 |
| Access map-pattern match based prefetch unit for a processor Grant 9,015,422 - Meier , et al. April 21, 2 | 2015-04-21 |
| Least Recently Used Mechanism for Cache Line Eviction from a Cache Memory App 20150026404 - Lilly; Brian P. ; et al. | 2015-01-22 |
| Access Map-Pattern Match Based Prefetch Unit for a Processor App 20150026413 - Meier; Stephan G. ; et al. | 2015-01-22 |
| Global Maintenance Command Protocol In A Cache Coherent System App 20140317358 - Meier; Stephan G. ; et al. | 2014-10-23 |
| Multi-core Processor Instruction Throttling App 20140317425 - Lien; Wei-Han ; et al. | 2014-10-23 |
| Converting memory accesses near barriers into prefetches Grant 8,856,447 - Williams, III October 7, 2 | 2014-10-07 |
| It Instruction Pre-decode App 20140244976 - Sundar; Shyam ; et al. | 2014-08-28 |
| Multi-Level Dispatch for a Superscalar Processor App 20140215188 - Mylius; John H. ; et al. | 2014-07-31 |
| Persistent Relocatable Reset Vector for Processor App 20140215182 - de Cesare; Josh P. ; et al. | 2014-07-31 |
| Usefulness Indication For Indirect Branch Prediction Training App 20140195789 - Gupta; Sandeep ; et al. | 2014-07-10 |
| Flush Engine App 20140195737 - Lilly; Brian P. ; et al. | 2014-07-10 |
| Trust zone support in system on a chip having security enclave processor Grant 8,775,757 - Polzin , et al. July 8, 2 | 2014-07-08 |
| Cache Policies For Uncacheable Memory Requests App 20140181403 - Lilly; Brian P. ; et al. | 2014-06-26 |
| Branch Predictor for Wide Issue, Arbitrarily Aligned Fetch App 20140089647 - Kountanis; Ian D. ; et al. | 2014-03-27 |
| Trust Zone Support in System on a Chip Having Security Enclave Processor App 20140089617 - Polzin; R. Stephen ; et al. | 2014-03-27 |
| Multi-Destination Instruction Handling App 20140089638 - Mylius; John H. ; et al. | 2014-03-27 |
| Barrier Colors App 20140089589 - Meier; Stephan G. ; et al. | 2014-03-27 |
| Converting Memory Accesses Near Barriers Into Prefetches App 20140025892 - Williams III; Gerard R. | 2014-01-23 |
| Zero Cycle Load App 20130339671 - Williams, III; Gerard R. ; et al. | 2013-12-19 |
| Load-store Dependency Predictor Pc Hashing App 20130326198 - Meier; Stephan G. ; et al. | 2013-12-05 |
| Load-store Dependency Predictor Content Management App 20130298127 - Meier; Stephan G. ; et al. | 2013-11-07 |
| Optimizing Register Initialization Operations App 20130290680 - Keller; James B. ; et al. | 2013-10-31 |
| Register File Power Savings App 20130290681 - Keller; James B. ; et al. | 2013-10-31 |
| Zero Cycle Move App 20130275720 - Keller; James B. ; et al. | 2013-10-17 |
| Coordinated Prefetching In Hierarchically Cached Processors App 20130254485 - Kannan; Hari S. ; et al. | 2013-09-26 |
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