Willey; Aaron

Patent Applications and Registrations

Patent applications and USPTO patent grants for Willey; Aaron.The latest application filed is for "single-lock delay locked loop with cycle counter and method therefor".

Company Profile

3.45.29

Willey; Aaron - Hayward CA
Willey; Aaron - South Burlington VT
Willey; Aaron - Burlington VT
Willey; Aaron - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Time based feed forward equalization (TFFE) for high-speed DDR transmitter Grant 10,848,352 - Rathor , et al. November 24, 2	2020-11-24
High-speed low VT drift receiver Grant 10,705,984 - Fazeel , et al.	2020-07-07
Auto-zeroing receiver for memory interface devices Grant 10,545,895 - Willey , et al. Ja	2020-01-28
High-speed low VT drift receiver Grant 10,545,889 - Fazeel , et al. Ja	2020-01-28
Single-lock delay locked loop with cycle counter and method therefor Grant 10,250,265 - Qi , et al.	2019-04-02
Single-lock Delay Locked Loop With Cycle Counter And Method Therefor App 20180351560 - Qi; Jieming ; et al.	2018-12-06
Measurement initialization circuitry Grant 9,419,628 - Willey , et al. August 16, 2	2016-08-16
Current generator circuit and methods for providing an output current Grant 9,244,479 - Willey January 26, 2	2016-01-26
Apparatus and methods for altering the timing of a clock signal Grant 9,225,319 - Ma , et al. December 29, 2	2015-12-29
Power supply induced signal jitter compensation Grant 9,202,542 - Ma , et al. December 1, 2	2015-12-01
Phase change memory with bit line matching Grant 9,036,408 - Jurasek , et al. May 19, 2	2015-05-19
Differential amplifiers, clock generator circuits, delay lines and methods Grant 8,947,141 - Willey February 3, 2	2015-02-03
Measurement Initialization Circuitry App 20140375366 - Willey; Aaron ; et al.	2014-12-25
Delay line scheme with no exit tree Grant 8,901,938 - Willey , et al. December 2, 2	2014-12-02
Current Generator Circuit And Methods For Providing An Output Current App 20140340069 - WILLEY; AARON	2014-11-20
Power Supply Induced Signal Jitter Compensation App 20140320190 - Ma; Yantao ; et al.	2014-10-30
Measurement initialization circuitry Grant 8,841,949 - Willey , et al. September 23, 2	2014-09-23
Differential Amplifiers, Clock Generator Circuits, Delay Lines And Methods App 20140253193 - Willey; Aaron	2014-09-11
Current generator circuit and method for reduced power consumption and fast response Grant 8,829,882 - Willey September 9, 2	2014-09-09
Clock signal generators having a reduced power feedback clock path and methods for generating clocks Grant 8,816,736 - Willey , et al. August 26, 2	2014-08-26
Delay lines, amplifier systems, transconductance compensating systems and methods of compensating Grant 8,779,802 - Willey July 15, 2	2014-07-15
Power supply induced signal jitter compensation Grant 8,779,822 - Ma , et al. July 15, 2	2014-07-15
Apparatus And Methods For Altering The Timing Of A Clock Signal App 20140152361 - Ma; Yantao ; et al.	2014-06-05
Differential amplifiers, clock generator circuits, delay lines and methods Grant 8,729,941 - Willey May 20, 2	2014-05-20
Clock Signal Generators Having A Reduced Power Feedback Clock Path And Methods For Generating Clocks App 20140119133 - Willey; Aaron ; et al.	2014-05-01
Delay lines, amplifier systems, transconductance compensating systems and methods of compensating Grant 8,710,871 - Willey April 29, 2	2014-04-29
Measurement Initialization Circuitry App 20140097880 - WILLEY; AARON ; et al.	2014-04-10
Clock signal generators having a reduced power feedback clock path and methods for generating clocks Grant 8,648,635 - Willey , et al. February 11, 2	2014-02-11
Apparatus and methods for altering the timing of a clock signal Grant 8,643,418 - Ma , et al. February 4, 2	2014-02-04
Clock Signal Generators Having A Reduced Power Feedback Clock Path And Methods For Generating Clocks App 20130343134 - Willey; Aaron ; et al.	2013-12-26
Measurement initialization circuitry Grant 8,604,850 - Willey , et al. December 10, 2	2013-12-10
Power Supply Induced Signal Jitter Compensation App 20130241619 - Ma; Yantao ; et al.	2013-09-19
Delay Line Scheme With No Exit Tree App 20130193986 - Willey; Aaron ; et al.	2013-08-01
Clock signal generators having a reduced power feedback clock path and methods for generating clocks Grant 8,493,104 - Willey , et al. July 23, 2	2013-07-23
Bias circuit and amplifier providing constant output current for a range of common mode inputs Grant 8,471,635 - Jurasek , et al. June 25, 2	2013-06-25
Clock signal generators having a reduced power feedback clock path and methods for generating clocks Grant 8,461,889 - Willey , et al. June 11, 2	2013-06-11
Power supply induced signal jitter compensation Grant 8,436,670 - Ma , et al. May 7, 2	2013-05-07
Mixed-mode input buffer Grant 8,427,204 - Willey April 23, 2	2013-04-23
Semiconductor package structure with common gold plated metal conductor on die and substrate Grant 8,405,214 - Willey , et al. March 26, 2	2013-03-26
Semiconductor Package Structure With Low Inductance App 20130037951 - Willey; Aaron ; et al.	2013-02-14
Delay lock loop and delay lock method Grant 8,373,462 - Ma , et al. February 12, 2	2013-02-12
Delay Lines, Amplifier Systems, Transconductance Compensating Systems And Methods Of Compensating App 20130015899 - Willey; Aaron	2013-01-17
Delay Lines, Amplifier Systems, Transconductance Compensating Systems And Methods Of Compensating App 20120326786 - Willey; Aaron	2012-12-27
Apparatus And Methods For Altering The Timing Of A Clock Signal App 20120306554 - Ma; Yantao ; et al.	2012-12-06
Delay Lock Loop And Delay Lock Method App 20120293221 - Ma; Yantao ; et al.	2012-11-22
Clock Signal Generators Having A Reduced Power Feedback Clock Path And Methods For Generating Clocks App 20120268171 - Willey; Aaron ; et al.	2012-10-25
Delay lines, amplifier systems, transconductance compensating systems and methods of compensating Grant 8,283,950 - Willey October 9, 2	2012-10-09
Measurement Initialization Circuitry App 20120249193 - Willey; Aaron ; et al.	2012-10-04
Power Supply Induced Signal Jitter Compensation App 20120182057 - Ma; Yantao ; et al.	2012-07-19
Differential Amplifiers, Clock Generator Circuits, Delay Lines And Methods App 20120086488 - Willey; Aaron	2012-04-12
Current Generator Circuit App 20120049817 - Willey; Aaron	2012-03-01
Delay Lines, Amplifier Systems, Transconductance Compensating Systems And Methods Of Compensating App 20120038405 - Willey; Aaron	2012-02-16
Mixed-mode Input Buffer App 20120001663 - Willey; Aaron	2012-01-05
Clock Signal Generators Having A Reduced Power Feedback Clock Path And Methods For Generating Clocks App 20110248752 - Willey; Aaron ; et al.	2011-10-13
Bias Circuit And Amplifier Providing Constant Output Current For A Range Of Common Mode Inputs App 20110204981 - Jurasek; Ryan ; et al.	2011-08-25
Bias circuit and amplifier providing constant output current for a range of common mode inputs Grant 7,944,300 - Jurasek , et al. May 17, 2	2011-05-17
Bias Circuit And Amplifier Providing Constant Output Current For A Range Of Common Mode Inputs App 20110050343 - Jurasek; Ryan ; et al.	2011-03-03

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.