Wilford; John R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wilford; John R..The latest application filed is for "apparatus and method for hidden-refresh modification".

Company Profile

0.17.8

Wilford; John R. - Boise ID
Wilford; John R. - Meridian ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Apparatus and method for hidden-refresh modification Grant 8,902,688 - Schreck , et al. December 2, 2	2014-12-02
Apparatus And Method For Hidden-refresh Modification App 20140043919 - Schreck; John ; et al.	2014-02-13
System and method for hidden refresh rate modification Grant 8,559,259 - Schreck , et al. October 15, 2	2013-10-15
System And Method For Hidden Refresh Rate Modification App 20120155201 - Schreck; John ; et al.	2012-06-21
System and method for hidden-refresh rate modification Grant 8,130,585 - Schreck , et al. March 6, 2	2012-03-06
System And Method For Hidden-refresh Rate Modification App 20090225617 - Schreck; John ; et al.	2009-09-10
System and method for hidden-refresh rate modification Grant 7,532,532 - Schreck , et al. May 12, 2	2009-05-12
System and method for hidden-refresh rate modification App 20060268643 - Schreck; John ; et al.	2006-11-30
Testmode to increase acceleration in burn-in Grant 7,050,342 - Gans , et al. May 23, 2	2006-05-23
Circuit and method for reducing memory idle cycles Grant 6,721,233 - Wilford , et al. April 13, 2	2004-04-13
Testmode to increase acceleration in burn-in App 20040047226 - Gans, Dean D. ; et al.	2004-03-11
Testmode to increase acceleration in burn-in Grant 6,621,755 - Gans , et al. September 16, 2	2003-09-16
Circuit and method for reducing memory idle cycles App 20030161206 - Wilford, John R. ; et al.	2003-08-28
Testmode to increase accleration in burn-in App 20030048685 - Gans, Dean D. ; et al.	2003-03-13
Circuit And Method For Reducing Memory Idle Cycles App 20030035339 - Wilford, John R. ; et al.	2003-02-20
Integrated circuit having temporary conductive path structure and method for forming the same Grant 6,323,076 - Wilford November 27, 2	2001-11-27
Method and system for adaptively adjusting control signal timing in a memory device Grant 6,317,381 - Gans , et al. November 13, 2	2001-11-13
Method and apparatus for adjusting control signal timing in a memory device Grant 6,304,511 - Gans , et al. October 16, 2	2001-10-16
Digital voltage translator and its method of operation Grant 6,242,949 - Wilford June 5, 2	2001-06-05
Memory device with local write data latches Grant 6,219,283 - Wilford April 17, 2	2001-04-17
Memory with combined synchronous burst and bus efficient functionality Grant 6,163,500 - Wilford , et al. December 19, 2	2000-12-19
Method and apparatus for adjusting control signal timing in a memory device Grant 6,111,812 - Gans , et al. August 29, 2	2000-08-29
Digital voltage translator and its method of operation Grant 6,020,762 - Wilford February 1, 2	2000-02-01
Method and apparatus for biasing the substrate of an integrated circuit to an externally adjustable voltage Grant 5,905,682 - Gans , et al. May 18, 1	1999-05-18

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