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name:-0.0096549987792969
name:-0.056880950927734
name:-0.00099921226501465
Wiesner; Robert Patent Filings

Wiesner; Robert

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wiesner; Robert.The latest application filed is for "integrated circuit including buried cavity and manufacturing method".

Company Profile
0.15.11
  • Wiesner; Robert - Bad Aibling DE
  • Wiesner; Robert - Chandler AZ
  • Wiesner; Robert - Regensburg DE
  • Wiesner, Robert - Pullach DE
  • Wiesner; Robert - Broomall PA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Isolation of semiconductor device with buried cavity
Grant 10,553,675 - Schmidt , et al. Fe
2020-02-04
Integrated Circuit Including Buried Cavity and Manufacturing Method
App 20180108675 - Schmidt; Sebastian ;   et al.
2018-04-19
Hierarchical multi-core debugger interface
Grant 9,606,888 - Wiesner , et al. March 28, 2
2017-03-28
Hardware support for performance analysis
Grant 9,195,524 - Wiesner , et al. November 24, 2
2015-11-24
Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
Grant 9,030,877 - Strenz , et al. May 12, 2
2015-05-12
Method And System For Implicit Or Explicit Online Repair Of Memory
App 20140075093 - Wiesner; Robert ;   et al.
2014-03-13
Memory cell, a method for forming a memory cell, and a method for operating a memory cell
Grant 8,649,205 - Peters , et al. February 11, 2
2014-02-11
Safe memory storage by internal operation verification
Grant 8,560,899 - Brewerton , et al. October 15, 2
2013-10-15
Memory Cell, A Method For Forming A Memory Cell, And A Method For Operating A Memory Cell
App 20130208527 - Peters; Christian ;   et al.
2013-08-15
Memory Cell Arrangement, Method for Controlling a Memory Cell, Memory Array and Electronic Device
App 20130033934 - Strenz; Robert ;   et al.
2013-02-07
Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
Grant 8,320,191 - Strenz , et al. November 27, 2
2012-11-27
System and application debugging
Grant 8,112,683 - Wiesner , et al. February 7, 2
2012-02-07
Safe Memory Storage By Internal Operation Verification
App 20120030531 - Brewerton; Simon ;   et al.
2012-02-02
Method and system for efficient range and stride checking
Grant 7,774,764 - Metzger , et al. August 10, 2
2010-08-10
Memory Cell Arrangement, Method for Controlling a Memory Cell, Memory Array and Electronic Device
App 20090059678 - Strenz; Robert ;   et al.
2009-03-05
Method and system for performing link-time code optimization without additional code analysis
Grant 7,418,699 - Metzger , et al. August 26, 2
2008-08-26
Method and system for efficient range and stride checking
App 20070143746 - Metzger; Markus T. ;   et al.
2007-06-21
Method for fabricating a field-effect transistor having a floating gate
Grant 7,060,558 - Hofmann , et al. June 13, 2
2006-06-13
Method and system for performing link-time code optimization without additional code analysis
App 20050188362 - Metzger, Markus T. ;   et al.
2005-08-25
Method for fabricating a field-effect transistor having a floating gate
App 20030119261 - Hofmann, Franz ;   et al.
2003-06-26
Structure for cooling helicopter tail rotor gearbox
Grant 3,966,145 - Wiesner June 29, 1
1976-06-29

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