Wieland; Douglas P.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Wieland; Douglas P..The latest application filed is for "method and apparatus for implementing a pre-implemented circuit design for a programmable logic device".
- Wieland; Douglas P. - Sunnyvale CA
| Patent | Date |
|---|---|
| Method and apparatus for implementing a pre-implemented circuit design for a programmable logic device Grant 7,392,498 - Srinivasan , et al. June 24, 2 | 2008-06-24 |
| Routing architecture using a direct connect routing mesh Grant 6,069,490 - Ochotta , et al. May 30, 2 | 2000-05-30 |
| Interconnect architecture for field programmable gate array using variable length conductors Grant 5,801,546 - Pierce , et al. September 1, 1 | 1998-09-01 |
| Interconnect architecture for field programmable gate array Grant 5,760,604 - Pierce , et al. June 2, 1 | 1998-06-02 |
| Interconnect architecture for field programmable gate array using variable length conductors Grant 5,581,199 - Pierce , et al. December 3, 1 | 1996-12-03 |
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