Wiedmann; Siegfried K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wiedmann; Siegfried K..The latest application filed is for "circuit for increasing data-valid time which incorporates a parallel latch".

Company Profile

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Wiedmann; Siegfried K. - Stuttgart DE
Wiedmann; Siegfried K. - Peekskill NY
Wiedmann; Siegfried K. - Millwood NY
Wiedmann; Siegfried K. - Untergruppenbach DT
Wiedmann; Siegfried K. - Poughkeepsie NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Circuit for increasing data-valid time which incorporates a parallel latch Grant 5,467,311 - Wiedmann , et al. November 14, 1	1995-11-14
Double-ended memory cell array using interleaved bit lines and method of fabrication therefore Grant 4,992,981 - Ganssloser , et al. February 12, 1	1991-02-12
Interconnection of opposite conductivity type semiconductor regions Grant 4,785,341 - Ning , et al. November 15, 1	1988-11-15
Stability testing of semiconductor memories Grant 4,713,814 - Andrusch , et al. December 15, 1	1987-12-15
Semiconductor memory having subarrays and partial word lines Grant 4,694,433 - Wiedmann September 15, 1	1987-09-15
Semiconductor memory Grant 4,596,000 - Wiedmann June 17, 1	1986-06-17
Method of and circuit arrangement for reading an integrated semiconductor store with storage cells in MTL (I.sup.2 L) technology Grant 4,521,873 - Heuber , et al. June 4, 1	1985-06-04
Self-aligned semiconductor circuits and process therefor Grant 4,338,622 - Feth , et al. July 6, 1	1982-07-06
Method of fabricating buried injector memory cell formed from vertical complementary bipolar transistor circuits utilizing mono-poly deposition Grant 4,274,891 - Silvestri , et al. June 23, 1	1981-06-23
IIL With partially spaced collars Grant 4,259,730 - Heuber , et al. March 31, 1	1981-03-31
Self-aligned Schottky diode structure and method of fabrication Grant 4,254,428 - Feth , et al. March 3, 1	1981-03-03
Current hogging injection logic Grant 4,035,664 - Berger , et al. July 12, 1	1977-07-12
Sense circuit for memory storage system Grant 4,027,176 - Heuber , et al. May 31, 1	1977-05-31
Write speed-up circuit for integrated data memories Grant 4,023,148 - Heuber , et al. May 10, 1	1977-05-10
Method and circuit arrangement for operating a highly integrated monolithic information store Grant 4,007,451 - Heuber , et al. February 8, 1	1977-02-08
Elimination of SCR structure Grant 3,955,210 - Bhatia , et al. May 4, 1	1976-05-04
Monolithically integrable digital basic circuit Grant 3,922,565 - Berger , et al. November 25, 1	1975-11-25
Multi Layered Vertical Transistor Having Reach-through Isolating Contacts Grant 3,823,353 - Berger , et al. July 9, 1	1974-07-09
Isolation Diffusion Method For Making Reduced Beta Transistor Or Diodes Grant 3,770,519 - Wiedmann November 6, 1	1973-11-06
Stored Charge Storage Cell Using A Non Latching Scr Type Device Grant 3,729,719 - Wiedmann April 24, 1	1973-04-24
Inverse Transistor With High Current Gain Grant 3,657,612 - Wiedmann April 18, 1	1972-04-18
Shift Register Grant 3,655,999 - Wiedmann April 11, 1	1972-04-11
Monolithic Associative Memory Cell Grant 3,643,231 - Lohrey , et al. February 15, 1	1972-02-15

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