Patent | Date |
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Semiconductor Structure Including A Transistor Having Stress Creating Regions And Method For The Formation Thereof App 20170330970 - Malinowski; Arkadiusz ;   et al. | 2017-11-16 |
Semiconductor structure including a transistor having stress creating regions and method for the formation thereof Grant 9,812,573 - Malinowski , et al. November 7, 2 | 2017-11-07 |
Semiconductor device with thin-film resistor Grant 9,627,409 - Moll , et al. April 18, 2 | 2017-04-18 |
E-fuse design for high-K metal-gate technology Grant 9,515,155 - Boschke , et al. December 6, 2 | 2016-12-06 |
Semiconductor device with thin-film resistor App 20160300856 - Moll; Hans-Peter ;   et al. | 2016-10-13 |
Method Including A Replacement Of A Dummy Gate Structure With A Gate Structure Including A Ferroelectric Material App 20160071947 - Wiatr; Maciej ;   et al. | 2016-03-10 |
Strain engineering in semiconductor devices by using a piezoelectric material Grant 9,263,582 - Kronholz , et al. February 16, 2 | 2016-02-16 |
Semiconductor fuse with enhanced post-programming resistance Grant 9,153,534 - Kurz , et al. October 6, 2 | 2015-10-06 |
Field Effect Transistors For High-performance And Low-power Applications App 20150200270 - Flachowsky; Stefan ;   et al. | 2015-07-16 |
Novel E-fuse Design For High-k Metal-gate Technology App 20150179753 - Boschke; Roman ;   et al. | 2015-06-25 |
Strain Engineering In Semiconductor Devices By Using A Piezoelectric Material App 20150054083 - Kronholz; Stephan ;   et al. | 2015-02-26 |
Semiconductor Fuse With Enhanced Post-programming Resistance App 20150034953 - KURZ; Andreas ;   et al. | 2015-02-05 |
Reduction of defect rates in PFET transistors comprising a Si/Ge semiconductor material formed by epitaxial growth Grant 8,939,765 - Kronholz , et al. January 27, 2 | 2015-01-27 |
Strain engineering in semiconductor devices by using a piezoelectric material Grant 8,884,379 - Kronholz , et al. November 11, 2 | 2014-11-11 |
Reducing defect rate during deposition of a channel semiconductor alloy into an in situ recessed active region Grant 8,836,047 - Kronholz , et al. September 16, 2 | 2014-09-16 |
Method of forming transistor with increased gate width Grant 8,778,772 - Tan , et al. July 15, 2 | 2014-07-15 |
Semiconductor devices comprising a channel semiconductor alloy formed with reduced STI topography Grant 8,748,275 - Thees , et al. June 10, 2 | 2014-06-10 |
Enhancing deposition uniformity of a channel semiconductor alloy by forming a recess prior to the well implantation Grant 8,722,486 - Kronholz , et al. May 13, 2 | 2014-05-13 |
Superior integrity of high-k metal gate stacks by preserving a resist material above end caps of gate electrode structures Grant 8,722,481 - Kronholz , et al. May 13, 2 | 2014-05-13 |
Sacrificial spacer approach for differential source/drain implantation spacers in transistors comprising a high-k metal gate electrode structure Grant 8,709,902 - Scheiper , et al. April 29, 2 | 2014-04-29 |
Test structure for controlling the incorporation of semiconductor alloys in transistors comprising high-k metal gate electrode structures Grant 8,673,668 - Kronholz , et al. March 18, 2 | 2014-03-18 |
Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ doped semiconductor material Grant 8,664,049 - Kronholz , et al. March 4, 2 | 2014-03-04 |
Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss Grant 8,652,913 - Gehring , et al. February 18, 2 | 2014-02-18 |
Semiconductor Fuse With Enhanced Post-programming Resistance App 20130313553 - KURZ; Andreas ;   et al. | 2013-11-28 |
Asymmetric transistor devices formed by asymmetric spacers and tilted implantation Grant 8,574,991 - Hoentschel , et al. November 5, 2 | 2013-11-05 |
Superior Integrity Of High-k Metal Gate Stacks By Preserving A Resist Material Above End Caps Of Gate Electrode Structures App 20130267044 - Kronholz; Stephan-Detlef ;   et al. | 2013-10-10 |
Differential threshold voltage adjustment in PMOS transistors by differential formation of a channel semiconductor material Grant 8,536,009 - Javorka , et al. September 17, 2 | 2013-09-17 |
Semiconductor fuse with enhanced post-programming resistance Grant 8,524,567 - Kurz , et al. September 3, 2 | 2013-09-03 |
NFET Device with Tensile Stressed Channel Region and Methods of Forming Same App 20130175577 - Tan; Chung Foong ;   et al. | 2013-07-11 |
Method of Forming Transistor with Increased Gate Width App 20130178045 - Tan; Chung Foong ;   et al. | 2013-07-11 |
Methods of Forming Faceted Stress-Inducing Stressors Proximate the Gate Structure of a Transistor App 20130175585 - Tan; Chung Foong ;   et al. | 2013-07-11 |
Superior integrity of high-k metal gate stacks by preserving a resist material above end caps of gate electrode structures Grant 8,481,381 - Kronholz , et al. July 9, 2 | 2013-07-09 |
Leakage control in field effect transistors based on an implantation species introduced locally at the STI edge Grant 8,481,404 - Kammler , et al. July 9, 2 | 2013-07-09 |
Transistor comprising an embedded semiconductor alloy in drain and source regions extending under the gate electrode Grant 8,460,980 - Kronholz , et al. June 11, 2 | 2013-06-11 |
Compensation of operating time-related degradation of operating speed by a constant total die power mode Grant 8,456,224 - Wiatr , et al. June 4, 2 | 2013-06-04 |
Semiconductor Fuse With Enhanced Post-programming Resistance App 20130062726 - Kurz; Andreas ;   et al. | 2013-03-14 |
Superior Integrity of High-K Metal Gate Stacks by Preserving a Resist Material Above End Caps of Gate Electrode Structures App 20130065329 - Kronholz; Stephan-Detlef ;   et al. | 2013-03-14 |
Method for forming a transistor comprising high-k metal gate electrode structures including a polycrystalline semiconductor material and embedded strain-inducing semiconductor alloys Grant 8,343,826 - Kronholz , et al. January 1, 2 | 2013-01-01 |
Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by corner rounding at the top of the gate electrode Grant 8,338,892 - Kronholz , et al. December 25, 2 | 2012-12-25 |
Buried etch stop layer in trench isolation structures for superior surface planarity in densely packed semiconductor devices Grant 8,334,573 - Wiatr , et al. December 18, 2 | 2012-12-18 |
Method for differential spacer removal by wet chemical etch process and device with differential spacer structure Grant 8,298,924 - Wiatr , et al. October 30, 2 | 2012-10-30 |
Reducing Defect Rate During Deposition Of A Channel Semiconductor Alloy Into An In Situ Recessed Active Region App 20120235249 - Kronholz; Stephan-Detlef ;   et al. | 2012-09-20 |
Asymmetric Transistor Devices Formed By Asymmetric Spacers And Tilted Implantation App 20120171830 - Hoentschel; Jan ;   et al. | 2012-07-05 |
Cold temperature control in a semiconductor device Grant 8,212,184 - Mowry , et al. July 3, 2 | 2012-07-03 |
Transistor Comprising High-K Metal Gate Electrode Structures Including a Polycrystalline Semiconductor Material and Embedded Strain-Inducing Semiconductor Alloys App 20120161250 - Kronholz; Stephan-Detlef ;   et al. | 2012-06-28 |
Semiconductor Devices Comprising a Channel Semiconductor Alloy Formed with Reduced STI Topography App 20120156846 - Thees; Hans-Juergen ;   et al. | 2012-06-21 |
Sacrificial Spacer Approach for Differential Source/Drain Implantation Spacers in Transistors Comprising a High-K Metal Gate Electrode Structure App 20120156837 - Scheiper; Thilo ;   et al. | 2012-06-21 |
Differential Threshold Voltage Adjustment in PMOS Transistors by Differential Formation of a Channel Semiconductor Material App 20120153401 - JAVORKA; Peter ;   et al. | 2012-06-21 |
Performance Enhancement In Transistors Comprising High-k Metal Gate Stacks And An Embedded Stressor By Performing A Second Epitaxy Step App 20120153354 - Kronholz; Stephan ;   et al. | 2012-06-21 |
Asymmetric transistor devices formed by asymmetric spacers and tilted implantation Grant 8,158,482 - Hoentschel , et al. April 17, 2 | 2012-04-17 |
Reducing silicide resistance in silicon/germanium-containing drain/source regions of transistors Grant 8,124,467 - Kronholz , et al. February 28, 2 | 2012-02-28 |
Transistor with Embedded Strain-Inducing Material and Dummy Gate Electrodes Positioned Adjacent to the Active Region App 20120025315 - Kronholz; Stephan ;   et al. | 2012-02-02 |
SOI device having a substrate diode formed by reduced implantation energy Grant 8,097,519 - Wiatr , et al. January 17, 2 | 2012-01-17 |
Test Structure for Controlling the Incorporation of Semiconductor Alloys in Transistors Comprising High-K Metal Gate Electrode Structures App 20120001174 - Kronholz; Stephan ;   et al. | 2012-01-05 |
Reduction of Defect Rates in PFET Transistors Comprising a Si/Ge Semiconductor Material Formed by Epitaxial Growth App 20110291163 - Kronholz; Stephan ;   et al. | 2011-12-01 |
Compensation of degradation of performance of semiconductor devices by clock duty cycle adaptation Grant 8,018,260 - Papageorgiou , et al. September 13, 2 | 2011-09-13 |
Enhancing Deposition Uniformity Of A Channel Semiconductor Alloy By Forming A Recess Prior To The Well Implantation App 20110156172 - Kronholz; Stephan ;   et al. | 2011-06-30 |
Semiconductor device having a strained semiconductor alloy concentration profile Grant 7,939,399 - Mowry , et al. May 10, 2 | 2011-05-10 |
Strain Enhancement In Transistors Comprising An Embedded Strain-inducing Semiconductor Alloy By Corner Rounding At The Top Of The Gate Electrode App 20110101469 - Kronholz; Stephan ;   et al. | 2011-05-05 |
Increasing stress transfer efficiency in a transistor by reducing spacer width during the drain/source implantation sequence Grant 7,923,338 - Wiatr , et al. April 12, 2 | 2011-04-12 |
Buried Etch Stop Layer In Trench Isolation Structures For Superior Surface Planarity In Densely Packed Semiconductor Devices App 20110049637 - Wiatr; Maciej ;   et al. | 2011-03-03 |
Method for creating tensile strain by selectively applying stress memorization techniques to NMOS transistors Grant 7,897,451 - Wiatr , et al. March 1, 2 | 2011-03-01 |
Leakage Control In Field Effect Transistors Based On An Implantation Species Introduced Locally At The Sti Edge App 20110024846 - Kammler; Thorsten ;   et al. | 2011-02-03 |
Semiconductor Element Formed In A Crystalline Substrate Material And Comprising An Embedded In Situ N-doped Semiconductor Material App 20100327358 - Kronholz; Stephan ;   et al. | 2010-12-30 |
Reducing Silicide Resistance In Silicon/germanium-containing Drain/source Regions Of Transistors App 20100244107 - Kronholz; Stephan ;   et al. | 2010-09-30 |
Method for creating tensile strain by repeatedly applied stress memorization techniques Grant 7,790,537 - Wei , et al. September 7, 2 | 2010-09-07 |
Strain Engineering In Semiconductor Devices By Using A Piezoelectric Material App 20100219719 - Kronholz; Stephan ;   et al. | 2010-09-02 |
Transistor Comprising An Embedded Semiconductor Alloy In Drain And Source Regions Extending Under The Gate Electrode App 20100219474 - Kronholz; Stephan ;   et al. | 2010-09-02 |
Compensation Of Degradation Of Performance Of Semiconductor Devices By Clock Duty Cycle Adaptation App 20100134167 - Papageorgiou; Vassilios ;   et al. | 2010-06-03 |
Compensation Of Operating Time-related Degradation Of Operating Speed By A Constant Total Die Power Mode App 20100109757 - Wiatr; Maciej ;   et al. | 2010-05-06 |
Asymmetric Transistor Devices Formed By Asymmetric Spacers And Tilted Implantation App 20100078736 - Hoentschel; Jan ;   et al. | 2010-04-01 |
Transistor With Embedded Si/ge Material Having Enhanced Boron Confinement App 20100025743 - Hoentschel; Jan ;   et al. | 2010-02-04 |
Cold Temperature Control In A Semiconductor Device App 20090295457 - Mowry; Anthony ;   et al. | 2009-12-03 |
Increasing Stress Transfer Efficiency In A Transistor By Reducing Spacer Width During The Drain/source Implantation Sequence App 20090246927 - Wiatr; Maciej ;   et al. | 2009-10-01 |
Method For Creating Tensile Strain By Selectively Applying Stress Memorization Techniques To Nmos Transistors App 20090142900 - Wiatr; Maciej ;   et al. | 2009-06-04 |
Soi Device Having A Substrate Diode Formed By Reduced Implantation Energy App 20090111223 - Wiatr; Maciej ;   et al. | 2009-04-30 |
Compensation Of Operating Time Related Degradation Of Operating Speed By Adapting The Supply Voltage App 20090085652 - Wiatr; Maciej ;   et al. | 2009-04-02 |
Transistor Having Reduced Gate Resistance And Enhanced Stress Transfer Efficiency And Method Of Forming The Same App 20090001479 - Wiatr; Maciej ;   et al. | 2009-01-01 |
Method For Creating Tensile Strain By Repeatedly Applied Stress Memorization Techniques App 20080237723 - Wei; Andy ;   et al. | 2008-10-02 |
Semiconductor Device Having A Strained Semiconductor Alloy Concentration Profile App 20080203427 - Mowry; Anthony ;   et al. | 2008-08-28 |
Method For Differential Spacer Removal By Wet Chemical Etch Process And Device With Differential Spacer Structure App 20080203486 - Wiatr; Maciej ;   et al. | 2008-08-28 |
Method For Forming Silicon/germanium Containing Drain/source Regions In Transistors With Reduced Silicon/germanium Loss App 20080182371 - Gehring; Andreas ;   et al. | 2008-07-31 |