Patent | Date |
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Wafer edge expose alignment method Grant 7,799,166 - Whitefield September 21, 2 | 2010-09-21 |
Method for calculating high-resolution wafer parameter profiles Grant 7,653,523 - Whitefield , et al. January 26, 2 | 2010-01-26 |
Voltage contrast monitor for integrated circuit defects Grant 7,560,292 - Whitefield July 14, 2 | 2009-07-14 |
Apparatus for wafer patterning to reduce edge exclusion zone Grant 7,460,211 - Whitefield , et al. December 2, 2 | 2008-12-02 |
Voltage Contrast Monitor For Integrated Circuit Defects App 20080061805 - Whitefield; Bruce | 2008-03-13 |
Voltage contrast monitor for integrated circuit defects Grant 7,323,768 - Whitefield January 29, 2 | 2008-01-29 |
Wafer edge structure measurement method Grant 7,312,880 - Whitefield , et al. December 25, 2 | 2007-12-25 |
Apparatus For Wafer Patterning To Reduce Edge Exclusion Zone App 20060191634 - Whitefield; Bruce ;   et al. | 2006-08-31 |
Method of wafer patterning for reducing edge exclusion zone Grant 7,074,710 - Whitefield , et al. July 11, 2 | 2006-07-11 |
Method Of Wafer Patterning For Reducing Edge Exclusion Zone App 20060094246 - Whitefield; Bruce ;   et al. | 2006-05-04 |
Wafer edge expose alignment method App 20060060299 - Whitefield; Bruce | 2006-03-23 |
Wafer edge structure measurement method App 20060044571 - Whitefield; Bruce ;   et al. | 2006-03-02 |
Method of mapping logic failures in an integrated circuit die Grant 6,986,112 - Whitefield , et al. January 10, 2 | 2006-01-10 |
Method and control system for improving CMP process by detecting and reacting to harmonic oscillation Grant 6,971,944 - Berman , et al. December 6, 2 | 2005-12-06 |
Voltage contrast monitor for integrated circuit defects App 20050224963 - Whitefield, Bruce | 2005-10-13 |
Method of detecting spatially correlated variations in a parameter of an integrated circuit die Grant 6,943,042 - Madge , et al. September 13, 2 | 2005-09-13 |
Voltage contrast monitor for integrated circuit defects Grant 6,936,920 - Whitefield August 30, 2 | 2005-08-30 |
Method And Control System For Improving Cmp Process By Detecting And Reacting To Harmonic Oscillation App 20050181706 - Berman, Michael J. ;   et al. | 2005-08-18 |
Method for calculating high-resolution wafer parameter profiles App 20050132308 - Whitefield, Bruce ;   et al. | 2005-06-16 |
Voltage contrast monitor for integrated circuit defects App 20050046019 - Whitefield, Bruce | 2005-03-03 |
Method of mapping logic failures in an integrated circuit die App 20050028115 - Whitefield, Bruce ;   et al. | 2005-02-03 |
Method of detecting spatially correlated variations in a parameter of an integrated circuit die Grant 6,787,379 - Madge , et al. September 7, 2 | 2004-09-07 |
Process for inhibiting edge peeling of coating on semiconductor substrate during formation of integrated circuit structure thereon Grant 6,767,692 - Young , et al. July 27, 2 | 2004-07-27 |
Method of detecting spatially correlated variations in a parameter of an integrated circuit die App 20040033635 - Madge, Robert ;   et al. | 2004-02-19 |
Integrated process tool monitoring system for semiconductor fabrication Grant 6,650,958 - Balazs , et al. November 18, 2 | 2003-11-18 |
Apparatus for removing photoresist edge beads from thin film substrates Grant 6,614,507 - Young , et al. September 2, 2 | 2003-09-02 |
Apparatus for removing photoresist edge beads from thin film substrates App 20030031959 - Young, Roger Y.B. ;   et al. | 2003-02-13 |
Method and apparatus for removing photoresist edge beads from thin film substrates Grant 6,495,312 - Young , et al. December 17, 2 | 2002-12-17 |
Method and structure for improving patterning design for processing Grant 5,654,897 - Tripathi , et al. August 5, 1 | 1997-08-05 |