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Patent applications and USPTO patent grants for White; Francis Roger.The latest application filed is for "deep trench capacitor for soi cmos devices for soft error immunity".
Patent | Date |
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Trench decoupling capacitor formed by RIE lag of through silicon via (TSV) etch Grant 8,298,906 - Bernstein , et al. October 30, 2 | 2012-10-30 |
Deep trench capacitor for SOI CMOS devices for soft error immunity Grant 7,989,865 - Barth, Jr. , et al. August 2, 2 | 2011-08-02 |
Deep trench capacitor and method of making same Grant 7,812,388 - Kemerer , et al. October 12, 2 | 2010-10-12 |
Deep trench capacitor and method of making same Grant 7,694,262 - Kemerer , et al. April 6, 2 | 2010-04-06 |
Deep Trench Capacitor For Soi Cmos Devices For Soft Error Immunity App 20100052026 - Barth, JR.; John Edward ;   et al. | 2010-03-04 |
Deep Trench Capacitor And Method Of Making Same App 20090100388 - Kemerer; Timothy Wayne ;   et al. | 2009-04-16 |
Deep Trench Capacitor And Method Of Making Same App 20080315274 - Kemerer; Timothy Wayne ;   et al. | 2008-12-25 |
Dual layer etch stop barrier Grant 6,680,259 - Lam , et al. January 20, 2 | 2004-01-20 |
Dual layer etch stop barrier App 20030207586 - Lam, Chung Hon ;   et al. | 2003-11-06 |
Silicon-on-insulator SRAM cells with increased stability and yield App 20030058675 - Aipperspach, Anthony Gus ;   et al. | 2003-03-27 |
Dual layer etch stop barrier App 20020145179 - Lam, Chung Hon ;   et al. | 2002-10-10 |
Dual Layer Etch Stop Barrier App 20010013638 - LAM, CHUNG HON ;   et al. | 2001-08-16 |
Semiconductor structure incorporating thin film transistors, and methods for its manufacture Grant 6,022,766 - Chen , et al. February 8, 2 | 2000-02-08 |
Semiconductor structure incorporating thin film transistors with undoped cap oxide layers Grant 5,675,185 - Chen , et al. October 7, 1 | 1997-10-07 |
Three-dimensional SRAM trench structure and fabrication method therefor Grant 5,670,803 - Beilstein, Jr. , et al. September 23, 1 | 1997-09-23 |
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