Wert; Joseph D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wert; Joseph D..The latest application filed is for "system and method for providing a low voltage thin gate input/output structure with thick gate overvoltage/backdrive protection".

Company Profile

0.17.0

Wert; Joseph D. - Arlington TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
System and method for providing a low voltage thin gate input/output structure with thick gate overvoltage/backdrive protection Grant 7,642,600 - Wert January 5, 2	2010-01-05
Apparatus and method for level shifting in power-on reset circuitry in dual power supply domains Grant 7,307,454 - Wert December 11, 2	2007-12-11
Transfer gate having overvoltage protection and method Grant 7,276,938 - Wert October 2, 2	2007-10-02
Circuitry for providing overvoltage backdrive protection Grant 7,123,053 - Wert October 17, 2	2006-10-17
Short circuit protection apparatus with self-clocking self-clearing latch Grant 6,960,940 - Wert , et al. November 1, 2	2005-11-01
Circuitry for providing overvoltage backdrive protection Grant 6,906,553 - Wert June 14, 2	2005-06-14
Apparatus and method for level shifting in power-on reset circuitry in dual power supply domains Grant 6,894,537 - Wert May 17, 2	2005-05-17
Power-up detection circuit with low current draw for dual power supply circuits Grant 6,853,221 - Wert February 8, 2	2005-02-08
Short circuit protection apparatus with self-clocking self-clearing latch Grant 6,731,139 - Wert , et al. May 4, 2	2004-05-04
Extended voltage range level shifter Grant 6,700,407 - Wert March 2, 2	2004-03-02
Double translation voltage level shifter and method Grant 6,683,485 - Wert January 27, 2	2004-01-27
Gate oxide protection method Grant 6,437,958 - Duncan , et al. August 20, 2	2002-08-20
Programmable high speed quiet I/O cell Grant 6,281,706 - Wert , et al. August 28, 2	2001-08-28
Gate oxide breakdown protection circuit for deep submicron processes Grant 6,081,412 - Duncan , et al. June 27, 2	2000-06-27
Voltage translation and overvoltage protection Grant 5,534,795 - Wert , et al. July 9, 1	1996-07-09
Voltage translation and overvoltage protection Grant 5,406,140 - Wert , et al. April 11, 1	1995-04-11
Signal bus line driver circuit Grant 5,247,207 - Wert , et al. September 21, 1	1993-09-21

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.