Werner; Tobias

Patent Applications and Registrations

Patent applications and USPTO patent grants for Werner; Tobias.The latest application filed is for "integrated circuit including logic circuitry".

Company Profile

7.38.32

Werner; Tobias - Weil im Schoenbuch DE
Werner; Tobias - Renningen DE
Werner; Tobias - Sindelfingen DE
WERNER; Tobias - Durbach DE
Werner; Tobias - Boeblingen DE
Werner; Tobias - Fellbach DE
Werner; Tobias - Schoenbuch DE
Werner; Tobias - Weil im Schoenicher DE
Werner; Tobias - Regensburg DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks

Patent Activity

Patent	Date
Integrated circuit including logic circuitry Grant 11,328,110 - Pille , et al. May 10, 2	2022-05-10
Integrated circuit with vertical structures on nodes of a grid Grant 11,171,142 - Pille , et al. November 9, 2	2021-11-09
Microelectronic device with a memory element utilizing stacked vertical devices Grant 11,164,879 - Pille , et al. November 2, 2	2021-11-02
Integrated Circuit Including Logic Circuitry App 20210312116 - Pille; Juergen ; et al.	2021-10-07
Laser-induced Incandescent Particle Sensor Comprising A Confocal Arrangement Of A Laser Spot And Of A Thermal Radiation Spot App 20200371009 - Ehlermann; Jens ; et al.	2020-11-26
Buried conductive layer supplying digital circuits Grant 10,833,089 - Pille , et al. November 10, 2	2020-11-10
Microelectronic device utilizing stacked vertical devices Grant 10,804,266 - Pille , et al. October 13, 2	2020-10-13
Projection device for data eyeglasses, data eyeglasses, and method for operating a projection device for data eyeglasses Grant 10,712,568 - Fiess , et al.	2020-07-14
Buried Conductive Layer Supplying Digital Circuits App 20200161312 - PILLE; Juergen ; et al.	2020-05-21
Microelectronic Device Utilizing Stacked Vertical Devices App 20200161300 - PILLE; Juergen ; et al.	2020-05-21
Microelectronic Device With A Memory Element Utilizing Stacked Vertical Devices App 20200161311 - PILLE; Juergen ; et al.	2020-05-21
Integrated Circuit With Vertical Structures On Nodes Of A Grid App 20200161310 - PILLE; Juergen ; et al.	2020-05-21
Piezoresistive Material App 20190221327 - SCHIBLI; Stefan ; et al.	2019-07-18
Projection Device For Data Eyeglasses, Data Eyeglasses, And Method For Operating A Projection Device For Data Eyeglasses App 20180203234 - Fiess; Reinhold ; et al.	2018-07-19
Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation Grant 9,997,218 - Bunce , et al. June 12, 2	2018-06-12
Layout of interconnect lines in integrated circuits Grant 9,904,754 - Hellner , et al. February 27, 2	2018-02-27
Layout of interconnect lines in integrated circuits Grant 9,898,571 - Hellner , et al. February 20, 2	2018-02-20
Dual Mode Operation Having Power Saving And Active Modes In A Stacked Circuit Topology With Logic Preservation App 20180005674 - BUNCE; PAUL A. ; et al.	2018-01-04
Automated stressing and testing of semiconductor memory cells Grant 9,837,142 - Chan , et al. December 5, 2	2017-12-05
Automated stressing and testing of semiconductor memory cells Grant 9,805,823 - Chan , et al. October 31, 2	2017-10-31
Managing semiconductor memory array leakage current Grant 9,792,967 - Bunce , et al. October 17, 2	2017-10-17
Dual mode operation having power saving and active modes in a stacked circuit topology with logic preservation Grant 9,786,339 - Bunce , et al. October 10, 2	2017-10-10
Managing semiconductor memory array leakage current Grant 9,761,289 - Bunce , et al. September 12, 2	2017-09-12
Dual Mode Operation Having Power Saving And Active Modes In A Stacked Circuit Topology With Logic Preservation App 20170243619 - BUNCE; PAUL A. ; et al.	2017-08-24
Layout Of Interconnect Lines In Integrated Circuits App 20170228489 - Hellner; Gerhard ; et al.	2017-08-10
Layout Of Interconnect Lines In Integrated Circuits App 20170228487 - Hellner; Gerhard ; et al.	2017-08-10
Memory circuit Grant 9,711,244 - Chan , et al. July 18, 2	2017-07-18
RAM at speed flexible timing and setup control Grant 9,627,017 - Eckert , et al. April 18, 2	2017-04-18
RAM at speed flexible timing and setup control Grant 9,627,090 - Eckert , et al. April 18, 2	2017-04-18
Ram At Speed Flexible Timing And Setup Control App 20170092341 - Eckert; Martin ; et al.	2017-03-30
Ram At Speed Flexible Timing And Setup Control App 20170092377 - Eckert; Martin ; et al.	2017-03-30
Transforming a phase-locked-loop generated chip clock signal to a local clock signal Grant 9,537,474 - Chan , et al. January 3, 2	2017-01-03
Transforming A Phase-locked-loop Generated Chip Clock Signal To A Local Clock Signal App 20160344377 - CHAN; Yuen Hung ; et al.	2016-11-24
Write address synchronization in 2 read/1write SRAM arrays Grant 9,437,285 - Barowski , et al. September 6, 2	2016-09-06
Write address synchronization in 2 read/1write SRAM arrays Grant 9,406,375 - Barowski , et al. August 2, 2	2016-08-02
Transforming a phase-locked-loop generated chip clock signal to a local clock signal Grant 9,401,698 - Chan , et al. July 26, 2	2016-07-26
Method and device for discharging an intermediate circuit of a power supply network Grant 9,401,597 - Werner , et al. July 26, 2	2016-07-26
SRAM array comprising multiple cell cores Grant 9,384,823 - Kugel , et al. July 5, 2	2016-07-05
Sram Array Comprising Multiple Cell Cores App 20160086659 - Kugel; Michael ; et al.	2016-03-24
Control device and method for operating an electrical machine driven by an inverter Grant 9,236,826 - Djonga , et al. January 12, 2	2016-01-12
Defective memory column replacement with load isolation Grant 8,964,493 - Penth , et al. February 24, 2	2015-02-24
Integrated circuit schematics having imbedded scaling information for generating a design instance Grant 8,918,749 - Kugel , et al. December 23, 2	2014-12-23
Local evaluation circuit for static random-access memory Grant 8,837,235 - Chan , et al. September 16, 2	2014-09-16
Local Evaluation Circuit for Static Random-Access Memory App 20140254290 - Chan; Yuen Hung ; et al.	2014-09-11
Defective Memory Column Replacement With Load Isolation App 20140192602 - Penth; Silke ; et al.	2014-07-10
Integrated Circuit Schematics Having Imbedded Scaling Information For Generating A Design Instance App 20140130004 - Kugel; Michael ; et al.	2014-05-08
Control Device And Method For Operating An Electrical Machine Driven By An Inverter App 20140084830 - Djonga; Christian ; et al.	2014-03-27
Method and system for generating a placement layout of a VLSI circuit design Grant 8,631,376 - Werner , et al. January 14, 2	2014-01-14
Method And Device For Discharging An Intermediate Circuit Of A Power Supply Network App 20130200731 - Werner; Tobias ; et al.	2013-08-08
System and Method for Placing Integrated Circuit Functional Blocks According to Dataflow Width App 20120005643 - Schroeder; Friedrich ; et al.	2012-01-05
Method and Circuit Arrangement for Performing a Write Through Operation, and SRAM Array With Write Through Capability App 20110317478 - Chan; Yuen H. ; et al.	2011-12-29
Interleave Memory Array Arrangement App 20110310680 - Chan; Yuen H. ; et al.	2011-12-22
Enhanced programmable pulsewidth modulating circuit for array clock generation Grant 7,936,638 - Chan , et al. May 3, 2	2011-05-03
Enhanced Programmable Pulsewidth Modulating Circuit For Array Clock Generation App 20100302895 - Chan; Yuen H. ; et al.	2010-12-02
Topology for a n-way XOR/XNOR circuit Grant 7,557,614 - Bonsels , et al. July 7, 2	2009-07-07
Method for comparing two designs of electronic circuits Grant 7,546,565 - Fenkes , et al. June 9, 2	2009-06-09
Layout Generator for Routing and Designing an LSI App 20080301616 - Krauch; Ulrich ; et al.	2008-12-04
Tri-State Circuit Element Plus Tri-State-Multiplexer Circuitry App 20080258769 - Franger; Dirk ; et al.	2008-10-23
Method for comparing two designs of electronic circuits App 20080172640 - Fenkes; Joachim ; et al.	2008-07-17
Automatic method for routing and designing an LSI Grant 7,401,312 - Krauch , et al. July 15, 2	2008-07-15
Automatic method for routing and designing an LSI App 20050132319 - Krauch, Ulrich ; et al.	2005-06-16
Optical-chemical sensor Grant 6,835,351 - Huber , et al. December 28, 2	2004-12-28
Optical-chemical sensor Grant 6,613,282 - Huber , et al. September 2, 2	2003-09-02
Optical-chemical sensor App 20030101803 - Huber, Christian ; et al.	2003-06-05
Optical-chemical Sensor App 20020034826 - Huber, Christian ; et al.	2002-03-21
Luminescence-optical method and sensor layer for quantitative determination of at least one chemical component of a gaseous or liquid sample Grant 6,046,055 - Wolfbeis , et al. April 4, 2	2000-04-04
Luminescence-optical method and sensor layer for quantitative determination of at least one chemical component of a gaseous or liquid sample Grant 5,942,189 - Wolfbeis , et al. August 24, 1	1999-08-24