Wendel; Dieter F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wendel; Dieter F..The latest application filed is for "low-power multi-output local clock buffer".

Company Profile

0.9.7

Wendel; Dieter F. - Schoenaich DE
Wendel; Dieter F. - Sindelfingen DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of logic circuit synthesis and design using a dynamic circuit library Grant 8,136,061 - Dhong , et al. March 13, 2	2012-03-13
Programmable local clock buffer Grant 7,719,315 - Ngo , et al. May 18, 2	2010-05-18
Low-power multi-output local clock buffer Grant 7,589,565 - Sigal , et al. September 15, 2	2009-09-15
Low-power Multi-output Local Clock Buffer App 20090199038 - Sigal; Leon J. ; et al.	2009-08-06
Pulsed local clock buffer (LCB) characterization ring oscillator Grant 7,459,950 - Ngo , et al. December 2, 2	2008-12-02
Method Of Logic Circuit Synthesis And Design Using A Dynamic Circuit Library App 20080189670 - Dhong; Sang Hoo ; et al.	2008-08-07
Scannable dynamic logic latch circuit Grant 7,372,305 - Ngo , et al. May 13, 2	2008-05-13
Programmable Local Clock Buffer App 20080101522 - Ngo; Hung C. ; et al.	2008-05-01
Pulsed Local Clock Buffer (lcb) Characterization Ring Oscillator App 20080100360 - Ngo; Hung C. ; et al.	2008-05-01
Scannable Dynamic Logic Latch Circuit App 20080100344 - Ngo; Hung C. ; et al.	2008-05-01
Method of logic circuit synthesis and design using a dynamic circuit library Grant 7,363,609 - Dhong , et al. April 22, 2	2008-04-22
Method of logic circuit synthesis and design using a dynamic circuit library App 20030023948 - Dhong, Sang Hoo ; et al.	2003-01-30
Method And Apparatus For Synthesizing Levelized Logic App 20020152450 - Dhong, Sang Hoo ; et al.	2002-10-17
System and method for testing self-timed memory arrays Grant 5,896,399 - Lattimore , et al. April 20, 1	1999-04-20
Method and apparatus for synchronized pipeline data access of a memory system Grant 5,615,168 - Lattimore , et al. March 25, 1	1997-03-25
Double-ended memory cell array using interleaved bit lines and method of fabrication therefore Grant 4,992,981 - Ganssloser , et al. February 12, 1	1991-02-12

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