loadpatents
name:-0.046848058700562
name:-0.033308982849121
name:-0.00046086311340332
Wellman; John-David Patent Filings

Wellman; John-David

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wellman; John-David.The latest application filed is for "heterogeneous system on a chip scheduler".

Company Profile
0.34.39
  • Wellman; John-David - Hopewell Junction NY
  • Wellman; John-David - Yorktown Heights NY US
  • Wellman; John-David - Peekskill NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Instruction sequence merging and splitting for optimized accelerator implementation
Grant 11,360,772 - Buyuktosunoglu , et al. June 14, 2
2022-06-14
Heterogeneous System On A Chip Scheduler With Learning Agent
App 20220004430 - Vega; Augusto ;   et al.
2022-01-06
Heterogeneous System On A Chip Scheduler
App 20220004433 - Vega; Augusto ;   et al.
2022-01-06
Instruction Sequence Merging And Splitting For Optimized Accelerator Implementation
App 20210303306 - BUYUKTOSUNOGLU; Alper ;   et al.
2021-09-30
Dynamic Tuning Of A Simultaneous Multithreading Metering Architecture
App 20170212786 - ACAR; EMRAH ;   et al.
2017-07-27
Dynamic Tuning Of A Simultaneous Multithreading Metering Architecture
App 20170212824 - ACAR; EMRAH ;   et al.
2017-07-27
Single-thread cache miss rate estimation
Grant 9,626,293 - Bonanno , et al. April 18, 2
2017-04-18
Single thread cache miss rate estimation
Grant 9,619,385 - Bonanno , et al. April 11, 2
2017-04-11
Single-thread Cache Miss Rate Estimation
App 20160246716 - Bonanno; James J. ;   et al.
2016-08-25
Single-thread Cache Miss Rate Estimation
App 20160246722 - Bonanno; James J. ;   et al.
2016-08-25
Implementing instruction set architectures with non-contiguous register file specifiers
Grant 8,918,623 - Gschwind , et al. December 23, 2
2014-12-23
Methods for generating code for an architecture encoding an extended register specification
Grant 8,893,079 - Gschwind , et al. November 18, 2
2014-11-18
Methods for generating code for an architecture encoding an extended register specification
Grant 8,893,095 - Gschwind , et al. November 18, 2
2014-11-18
Accepting or rolling back execution of instructions based on comparing predicted and actual dependency control signals
Grant 8,589,662 - Altman , et al. November 19, 2
2013-11-19
Methods For Generating Code For An Architecture Encoding An Extended Register Specification
App 20120297171 - Gschwind; Michael Karl ;   et al.
2012-11-22
Methods For Generating Code For An Architecture Encoding An Extended Register Specification
App 20120297373 - Gschwind; Michael K. ;   et al.
2012-11-22
Methods for generating code for an architecture encoding an extended register specification
Grant 8,312,424 - Gschwind , et al. November 13, 2
2012-11-13
Implementing Instruction Set Architectures With Non-contiguous Register File Specifiers
App 20120265967 - Gschwind; Michael Karl ;   et al.
2012-10-18
Control Signal Memoization In A Multiple Instruction Issue Microprocessor
App 20120144166 - Altman; Erik Richter ;   et al.
2012-06-07
Implementing instruction set architectures with non-contiguous register file specifiers
Grant 8,166,281 - Gschwind , et al. April 24, 2
2012-04-24
Method and apparatus for data stream alignment support
Grant 8,156,310 - Eichenberger , et al. April 10, 2
2012-04-10
Control signal memoization in a multiple instruction issue microprocessor
Grant 8,151,092 - Altman , et al. April 3, 2
2012-04-03
Modeling system-level effects of soft errors
Grant 8,091,050 - Bose , et al. January 3, 2
2012-01-03
Augmenting of automated clustering-based trace sampling methods by user-directed phase detection
Grant 8,000,953 - Bell, Jr. , et al. August 16, 2
2011-08-16
Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
Grant 7,865,699 - Altman , et al. January 4, 2
2011-01-04
Implementing instruction set architectures with non-contiguous register file specifiers
Grant 7,793,081 - Gschwind , et al. September 7, 2
2010-09-07
Modeling System-Level Effects of Soft Errors
App 20100083203 - Bose; Pradip ;   et al.
2010-04-01
Implementing Instruction Set Architectures With Non-contiguous Register File Specifiers
App 20090300331 - Gschwind; Michael Karl ;   et al.
2009-12-03
Non-homogeneous multi-processor system with shared memory
Grant 7,509,457 - Altman , et al. March 24, 2
2009-03-24
Augmenting of Automated Clustering-Based Trace Sampling Methods by User-Directed Phase Detection
App 20090055153 - Bell, JR.; Robert H. ;   et al.
2009-02-26
System and method of execution of register pointer instructions ahead of instruction issues
Grant 7,496,733 - Altman , et al. February 24, 2
2009-02-24
Transient cache storage with discard function for disposable data
Grant 7,461,209 - Altman , et al. December 2, 2
2008-12-02
Computer processing system employing an instruction schedule cache
Grant 7,454,597 - Kailas , et al. November 18, 2
2008-11-18
Methods For Generating Code For An Architecture Encoding An Extended Register Specification
App 20080215856 - Gschwind; Michael Karl ;   et al.
2008-09-04
Implementing instruction set architectures with non-contiguous register file specifiers
Grant 7,421,566 - Gschwind , et al. September 2, 2
2008-09-02
Implementing Instruction Set Architectures With Non-contiguous Register File Specifiers
App 20080189519 - Gschwind; Michael Karl ;   et al.
2008-08-07
Symbolic Execution of Instructions on In-Order Processors
App 20080168260 - Zyuban; Victor ;   et al.
2008-07-10
Computer Processing System Employing An Instruction Schedule Cache
App 20080162884 - Kailas; Krishnan K. ;   et al.
2008-07-03
Non-Homogeneous Multi-Processor System With Shared Memory
App 20080162877 - Altman; Erik Richter ;   et al.
2008-07-03
Method And Apparatus To Extend The Number Of Instruction Bits In Processors With Fixed Length Instructions, In A Manner Compatible With Existing Code
App 20080065861 - Altman; Erik R. ;   et al.
2008-03-13
Method and apparatus for data stream alignment support
App 20080065863 - Eichenberger; Alexandre E. ;   et al.
2008-03-13
Extending the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
Grant 7,340,588 - Altman , et al. March 4, 2
2008-03-04
System And Method Of Execution Of Register Pointer Instructions Ahead Of Instruction Issues
App 20080052495 - ALTMAN; ERIK ;   et al.
2008-02-28
System and method of execution of register pointer instructions ahead of instruction issue
Grant 7,325,124 - Altman , et al. January 29, 2
2008-01-29
Mechanism and method for two level adaptive trace prediction
App 20070162895 - Altman; Erik R. ;   et al.
2007-07-12
Transient cache storage
App 20070130237 - Altman; Erik R. ;   et al.
2007-06-07
Method and apparatus for eliminating the need for register assignment, allocation, spilling and re-filling
Grant 7,206,923 - Eichenberger , et al. April 17, 2
2007-04-17
Method and apparatus for accessing misaligned data streams
App 20070050592 - Gschwind; Michael Karl ;   et al.
2007-03-01
Methods for generating code for an architecture encoding an extended register specification
App 20070038984 - Gschwind; Michael Karl ;   et al.
2007-02-15
Implementing instruction set architectures with non-contiguous register file specifiers
App 20070038848 - Gschwind; Michael Karl ;   et al.
2007-02-15
System and method for instruction memory storage and processing based on backwards branch control information
Grant 7,130,963 - Asaad , et al. October 31, 2
2006-10-31
Method and apparatus for predictive scheduling of memory accesses based on reference locality
App 20060236036 - Gschwind; Michael Karl ;   et al.
2006-10-19
Non-homogeneous multi-processor system with shared memory
App 20060190614 - Altman; Erik Richter ;   et al.
2006-08-24
Method and apparatus for embedding wide instruction words in a fixed-length instruction set architecture
App 20060174089 - Altman; Erik Richter ;   et al.
2006-08-03
Method and apparatus for control signals memoization in a multiple instruction issue microprocessor
App 20060155965 - Altman; Erik Richter ;   et al.
2006-07-13
Method and system for maintaining coherency in a multiprocessor system by broadcasting TLB invalidated entry instructions
Grant 6,970,982 - Altman , et al. November 29, 2
2005-11-29
System and method of execution of register pointer instructions ahead of instruction issue
App 20050251654 - Altman, Erik ;   et al.
2005-11-10
Method and apparatus for eliminating the need for register assignment, allocation, spilling and re-filling
App 20050132172 - Eichenberger, Alexandre E. ;   et al.
2005-06-16
Symmetric multi-processing system utilizing a DMAC to allow address translation for attached processors
Grant 6,907,477 - Altman , et al. June 14, 2
2005-06-14
Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code
App 20050114629 - Altman, Erik R. ;   et al.
2005-05-26
System and method for instruction memory storage and processing based on backwards branch control information
App 20050015537 - Asaad, Sameh W. ;   et al.
2005-01-20
Token based DMA
Grant 6,820,142 - Hofstee , et al. November 16, 2
2004-11-16
Symmetric multi-processing system
App 20040160835 - Altman, Erik R. ;   et al.
2004-08-19
Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism
Grant 6,779,049 - Altman , et al. August 17, 2
2004-08-17
Symmetric multi-processing system
App 20040107321 - Altman, Erik R. ;   et al.
2004-06-03
Method and apparatus for history-based movement of shared-data in coherent cache memories of a multiprocessor system using push prefetching
Grant 6,711,651 - Moreno , et al. March 23, 2
2004-03-23
Method and apparatus for memory prefetching based on intra-page usage history
Grant 6,678,795 - Moreno , et al. January 13, 2
2004-01-13
Token based DMA
App 20020078270 - Hofstee, Harm Peter ;   et al.
2002-06-20
Symmetric multi-processing system
App 20020078308 - Altman, Erik R. ;   et al.
2002-06-20

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