Weling; Milind

Patent Applications and Registrations

Patent applications and USPTO patent grants for Weling; Milind.The latest application filed is for "current-limiting electrodes".

Company Profile

0.26.7

Weling; Milind - Pleasanton CA
Weling; Milind - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Nonvolatile resistive memory element with an oxygen-gettering layer Grant 9,331,276 - Chiang , et al. May 3, 2	2016-05-03
Stacked bi-layer as the low power switchable RRAM Grant 9,246,094 - Wang , et al. January 26, 2	2016-01-26
Current-limiting Electrodes App 20160020392 - Wang; Yun ; et al.	2016-01-21
Doped narrow band gap nitrides for embedded resistors of resistive random access memory cells Grant 9,231,203 - Tendulkar , et al. January 5, 2	2016-01-05
Current-limiting electrodes Grant 9,224,951 - Wang , et al. December 29, 2	2015-12-29
Method of forming current-programmable inline resistor App 20150187841 - Wang; Yun ; et al.	2015-07-02
Stacked Bi-layer as the low power switchable RRAM App 20150188045 - Wang; Yun ; et al.	2015-07-02
Nonvolatile resistive memory element with an oxygen-gettering layer App 20150155485 - Chiang; Tony P. ; et al.	2015-06-04
Nonvolatile resistive memory element with an oxygen-gettering layer Grant 8,981,332 - Chiang , et al. March 17, 2	2015-03-17
Resistive random access memory cells having doped current limiting layers Grant 8,912,518 - Chi , et al. December 16, 2	2014-12-16
Nonvolatile resistive memory element with an oxygen-gettering layer App 20140268993 - Chiang; Tony P. ; et al.	2014-09-18
Resistive Random Access Memory Cells Having Doped Current Limiting layers App 20140124725 - Chi; David ; et al.	2014-05-08
Method of eliminating a lithography operation Grant 8,716,135 - Huckabay , et al. May 6, 2	2014-05-06
Method for self-aligned doubled patterning lithography Grant 8,679,981 - Weling , et al. March 25, 2	2014-03-25
Method of eliminating a lithography operation Grant 8,656,321 - Huckabay , et al. February 18, 2	2014-02-18
Method of eliminating a lithography operation Grant 8,440,569 - Weling , et al. May 14, 2	2013-05-14
Method for self-aligned doubled patterning lithography Grant 7,856,613 - Weling , et al. December 21, 2	2010-12-21
Method Of Eliminating A Lithography Operation App 20090146322 - WELING; MILIND ; et al.	2009-06-11
Customized polishing pad for selective process performance during chemical mechanical polishing Grant 7,018,282 - Drill , et al. March 28, 2	2006-03-28
Customized polishing pad for selective process performance during chemical mechanical polishing Grant 6,572,439 - Drill , et al. June 3, 2	2003-06-03
Methods for forming co-axial interconnect lines in a CMOS process for high speed applications Grant 6,569,757 - Weling , et al. May 27, 2	2003-05-27
Methods for implementing co-axial interconnect lines in a CMOS process for high speed RF and microwave applications Grant 6,545,338 - Bothra , et al. April 8, 2	2003-04-08
Manufacture of an integrated circuit isolation structure Grant 6,319,796 - Laparra , et al. November 20, 2	2001-11-20
Method of using a polish stop film to control dishing during copper chemical mechanical polishing Grant 6,242,805 - Weling June 5, 2	2001-06-05
Chemical wet etch removal of underlayer material after performing chemical mechanical polishing on a primary layer Grant 6,211,087 - Gabriel , et al. April 3, 2	2001-04-03
Method and apparatus for improved copper plating uniformity on a semiconductor wafer using optimized electrical currents Grant 6,193,860 - Weling February 27, 2	2001-02-27
Complementary material conditioning system for a chemical mechanical polishing machine Grant 6,022,265 - Drill , et al. February 8, 2	2000-02-08
Method of inspecting planarity of wafer surface after etchback step in integrated circuit fabrication Grant 5,420,796 - Weling , et al. May 30, 1	1995-05-30
Planarization Grant 5,378,318 - Weling , et al. January 3, 1	1995-01-03

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