loadpatents
name:-0.15888500213623
name:-0.110680103302
name:-0.016381978988647
Weis; Rolf Patent Filings

Weis; Rolf

Patent Applications and Registrations

Patent applications and USPTO patent grants for Weis; Rolf.The latest application filed is for "semiconductor die with a power device and method of manufacturing the same".

Company Profile
14.108.143
  • Weis; Rolf - Dresden DE
  • Weis; Rolf - Villach AT
  • Weis; Rolf - Wappingers Falls NY
  • Weis; Rolf - Wappinger Falls NY
  • Weis, Rolf - Wappingers NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor Die With A Power Device And Method Of Manufacturing The Same
App 20220285532 - Tegen; Stefan ;   et al.
2022-09-08
Electronic Circuit
App 20220254934 - Hensch; Richard ;   et al.
2022-08-11
Semiconductor device and method for producing a semiconductor device
Grant 11,404,535 - Weis , et al. August 2, 2
2022-08-02
Transistor Device
App 20220199827 - Weis; Rolf ;   et al.
2022-06-23
Electronic circuit with a transistor device, a level shifter and a drive circuit
Grant 11,342,467 - Hensch , et al. May 24, 2
2022-05-24
Semiconductor device and method of producing the same
Grant 11,309,434 - Mahmoud , et al. April 19, 2
2022-04-19
Fill Pattern For Power Transistor And Diode Devices
App 20220093792 - Weis; Rolf ;   et al.
2022-03-24
Superjunction transistor arrangement and method of producing thereof
Grant 11,245,002 - Weis , et al. February 8, 2
2022-02-08
Electronic Circuit With A Transistor Device, A Level Shifter And A Drive Circuit
App 20220037536 - Hensch; Richard ;   et al.
2022-02-03
Semiconductor Device Manufacturing By Thinning And Dicing
App 20220028727 - Fuchs; Cornelius ;   et al.
2022-01-27
Semiconductor Device And Method Of Producing The Same
App 20210376066 - Mahmoud; Ahmed ;   et al.
2021-12-02
Semiconductor Device And Method Of Producing The Same
App 20210376065 - Mahmoud; Ahmed ;   et al.
2021-12-02
Electronic circuit with a transistor device and a level shifter
Grant 11,183,598 - Hensch , et al. November 23, 2
2021-11-23
Lateral superjunction transistor device and method for producing thereof
Grant 11,094,780 - Weis , et al. August 17, 2
2021-08-17
Method for forming complementary doped semiconductor regions in a semiconductor body
Grant 10,903,079 - Weis , et al. January 26, 2
2021-01-26
Semiconductor Device and Method of Producing the Same
App 20200388672 - Weis; Rolf ;   et al.
2020-12-10
Semiconductor Device and Method of Producing the Same
App 20200295202 - Mahmoud; Ahmed ;   et al.
2020-09-17
Method for forming a battery element, a battery element and a battery
Grant 10,777,839 - Weis , et al. Sept
2020-09-15
Semiconductor Device and Method for Producing a Semiconductor Device
App 20200185494 - Weis; Rolf ;   et al.
2020-06-11
Lateral Superjunction Transistor Device and Method for Producing Thereof
App 20200127087 - Weis; Rolf ;   et al.
2020-04-23
Circuit arrangement having semiconductor switches
Grant 10,586,796 - Weis
2020-03-10
Electronic circuit with several electronic switches connected in series and a drive circuit
Grant 10,581,429 - Weis , et al.
2020-03-03
Electronic Circuit with a Transistor Device and a Level Shifter
App 20200044096 - Hensch; Richard ;   et al.
2020-02-06
Semiconductor device having silicide layers
Grant 10,490,642 - Weis , et al. Nov
2019-11-26
Semiconductor device having a channel region patterned into a ridge by adjacent gate trenches
Grant 10,439,030 - Meiser , et al. O
2019-10-08
Method for Forming Complementary Doped Semiconductor Regions in a Semiconductor Body
App 20190287804 - Weis; Rolf ;   et al.
2019-09-19
Transistor Arrangement and Method of Producing Thereof
App 20190198609 - Weis; Rolf ;   et al.
2019-06-27
Circuit Arrangement Having Semiconductor Switches
App 20190157266 - Weis; Rolf
2019-05-23
Methods of manufacturing a semiconductor device with a buried doped region and a contact structure
Grant 10,290,735 - Tegen , et al.
2019-05-14
Circuit arrangement having a first semiconductor switch and a second semiconductor switch
Grant 10,224,328 - Weis
2019-03-05
Electronic Circuit with Several Electronic Switches Connected in Series and a Drive Circuit
App 20180351549 - Weis; Rolf ;   et al.
2018-12-06
Semiconductor Device Having Silicide Layers
App 20180212031 - Weis; Rolf ;   et al.
2018-07-26
Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
Grant 9,972,619 - Weis , et al. May 15, 2
2018-05-15
Methods of Manufacturing a Semiconductor Device with a Buried Doped Region and a Contact Structure
App 20180122935 - Tegen; Stefan ;   et al.
2018-05-03
Circuit Arrangement Having a First Semiconductor Switch and a Second Semiconductor Switch
App 20180122803 - Weis; Rolf
2018-05-03
Circuit arrangement with a rectifier circuit
Grant 9,960,704 - Deboy , et al. May 1, 2
2018-05-01
Method for manufacturing a semiconductor device having silicide layers
Grant 9,941,375 - Weis , et al. April 10, 2
2018-04-10
Method for forming a power semiconductor device and a power semiconductor device
Grant 9,899,470 - Lemke , et al. February 20, 2
2018-02-20
Semiconductor device with buried doped region and contact structure
Grant 9,876,105 - Lemke , et al. January 23, 2
2018-01-23
Integrated circuit with at least two switches
Grant 9,859,274 - Weis January 2, 2
2018-01-02
Battery element, a battery and a method for forming a battery
Grant 9,859,542 - Weis , et al. January 2, 2
2018-01-02
Method for Forming a Power Semiconductor Device and a Power Semiconductor Device
App 20170345892 - Lemke; Marko ;   et al.
2017-11-30
Semiconductor Device Having a Channel Region Patterned into a Ridge by Adjacent Gate Trenches
App 20170317176 - Meiser; Andreas ;   et al.
2017-11-02
Power converter circuit
Grant 9,793,803 - Deboy , et al. October 17, 2
2017-10-17
Semiconductor device, integrated circuit and method of forming a semiconductor device
Grant 9,735,243 - Meiser , et al. August 15, 2
2017-08-15
Method for Manufacturing a Semiconductor Device Having Silicide Layers
App 20170222010 - Weis; Rolf ;   et al.
2017-08-03
Minimizing losses associated with stacked switch devices
Grant 9,705,486 - Granig , et al. July 11, 2
2017-07-11
Semiconductor device and method for manufacturing a semiconductor device
Grant 9,685,511 - Weis June 20, 2
2017-06-20
Semiconductor device with enhancement and depletion FinFET cells
Grant 9,659,929 - Weis May 23, 2
2017-05-23
Semiconductor component with field electrode between adjacent semiconductor fins and method for producing such a semiconductor component
Grant 9,653,305 - Tegen , et al. May 16, 2
2017-05-16
Integrated Circuit with a Plurality of Transistors and at Least One Voltage Limiting Structure
App 20170084606 - Meiser; Andreas ;   et al.
2017-03-23
Auxiliary supply for a switched-mode power supply controller using bang-bang regulation
Grant 9,590,507 - Herfurth , et al. March 7, 2
2017-03-07
Semiconductor Device with Contact Structures Extending Through an Interlayer and Method of Manufacturing
App 20170062276 - Tegen; Stefan ;   et al.
2017-03-02
Semiconductor Device with a Laterally Varying Doping Profile, and Method for Manufacturing Thereof
App 20170040317 - Tegen; Stefan ;   et al.
2017-02-09
Semiconductor arrangement with active drift zone
Grant 9,559,089 - Weis January 31, 2
2017-01-31
Method for Filling a Trench and Semiconductor Device
App 20170012110 - Weis; Rolf ;   et al.
2017-01-12
Semiconductor arrangement with active drift zone
Grant 9,530,764 - Weis , et al. December 27, 2
2016-12-27
Semiconductor Device Arrangement With A First Semiconductor Device And With A Plurality Of Second Semiconductor Devices
App 20160372466 - Weis; Rolf ;   et al.
2016-12-22
Circuit Arrangement with a Rectifier Circuit
App 20160373024 - Deboy; Gerald ;   et al.
2016-12-22
Transistor Arrangement Including Power Transistors and Voltage Limiting Means
App 20160343848 - Bartels; Martin ;   et al.
2016-11-24
Circuit arrangement with a first semiconductor device and with a plurality of second semiconductor devices
Grant 9,496,859 - Weis November 15, 2
2016-11-15
Circuit arrangement with a rectifier circuit
Grant 9,484,834 - Weis , et al. November 1, 2
2016-11-01
Method of forming a super junction semiconductor device having stripe-shaped regions of the opposite conductivity types
Grant 9,484,400 - Willmeroth , et al. November 1, 2
2016-11-01
Method of Manufacturing a Semiconductor Device Having a Buried Channel/Body Zone
App 20160284561 - Tegen; Stefan ;   et al.
2016-09-29
Method for manufacturing a semiconductor device and a semiconductor device
Grant 9,449,968 - Irsigler , et al. September 20, 2
2016-09-20
Circuit arrangement with a rectifier circuit
Grant 9,444,363 - Deboy , et al. September 13, 2
2016-09-13
Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
Grant 9,431,382 - Weis , et al. August 30, 2
2016-08-30
Circuit Arrangement with a Rectifier Circuit
App 20160248340 - Deboy; Gerald ;   et al.
2016-08-25
Insulation structure formed in a semiconductor substrate and method for forming an insulation structure
Grant 9,406,550 - Lemke , et al. August 2, 2
2016-08-02
Bidirectionally Blocking Electronic Switch Arrangement
App 20160189887 - Weis; Rolf ;   et al.
2016-06-30
Method of manufacturing a semiconductor device with buried channel/body zone and semiconductor device
Grant 9,368,408 - Tegen , et al. June 14, 2
2016-06-14
Semiconductor Component With Field Electrode Between Adjacent Semiconductor Fins And Method For Producing Such A Semiconductor Component
App 20160155809 - Tegen; Stefan ;   et al.
2016-06-02
Semiconductor Device with Buried Doped Region and Contact Structure
App 20160155840 - Lemke; Marko ;   et al.
2016-06-02
Power Transistor with Field-Electrode
App 20160149032 - Bartels; Martin ;   et al.
2016-05-26
Semiconductor Device with Enhancement and Depletion FinFET Cells
App 20160126243 - Weis; Rolf
2016-05-05
Semiconductor device with device separation structures
Grant 9,318,550 - Lemke , et al. April 19, 2
2016-04-19
Method of Forming a Super Junction Semiconductor Device Having Stripe-Shaped Regions of the Opposite Conductivity Types
App 20160104768 - Willmeroth; Armin ;   et al.
2016-04-14
Semiconductor device having buried gate electrode structures
Grant 9,276,107 - Lemke , et al. March 1, 2
2016-03-01
Semiconductor device with vertical transistor channels and a compensation structure
Grant 9,219,149 - Mauder , et al. December 22, 2
2015-12-22
Lateral power semiconductor device and method for manufacturing a lateral power semiconductor device
Grant 9,202,910 - Mauder , et al. December 1, 2
2015-12-01
Super junction semiconductor device comprising a cell area and an edge area
Grant 9,184,277 - Willmeroth , et al. November 10, 2
2015-11-10
Method for Forming a Battery Element, a Battery Element and a Battery
App 20150280271 - Weis; Rolf ;   et al.
2015-10-01
Battery Element, a Battery and a Method for Forming a Battery
App 20150280198 - Weis; Rolf ;   et al.
2015-10-01
Circuit Arrangement with a First Semiconductor Device and with a Plurality of Second Semiconductor Devices
App 20150256163 - Weis; Rolf
2015-09-10
Semiconductor Device Arrangement with a First Semiconductor Device and with a Plurality of Second Semiconductor Devices
App 20150243645 - Weis; Rolf ;   et al.
2015-08-27
Circuit Arrangement with a Rectifier Circuit
App 20150200605 - Weis; Rolf ;   et al.
2015-07-16
Method of Manufacturing a Semiconductor Device with Buried Channel/Body Zone and Semiconductor Device
App 20150187654 - Tegen; Stefan ;   et al.
2015-07-02
Method for Manufacturing a Semiconductor Device and a Semiconductor Device
App 20150187761 - Irsigler; Peter ;   et al.
2015-07-02
Semiconductor Device With Device Separation Structures
App 20150179736 - Lemke; Marko ;   et al.
2015-06-25
Half-bridge Circuit Having At Least Two Solid-state Switching Devices Connected In Series
App 20150180461 - Weis; Rolf ;   et al.
2015-06-25
Semiconductor Device Having Buried Gate Electrode Structures
App 20150145029 - Lemke; Marko ;   et al.
2015-05-28
Semiconductor Device, Integrated Circuit and Method of Forming a Semiconductor Device
App 20150137224 - Meiser; Andreas ;   et al.
2015-05-21
Circuit arrangement with a first semiconductor device and with a plurality of second semiconductor devices
Grant 9,035,690 - Weis May 19, 2
2015-05-19
Insulation Structure Formed in a Semiconductor Substrate and Method for Forming an Insulation Structure
App 20150115396 - Lemke; Marko ;   et al.
2015-04-30
Solid-state switching device having a high-voltage switching transistor and a low-voltage driver transistor
Grant 9,007,117 - Weis , et al. April 14, 2
2015-04-14
Circuit arrangement with a rectifier circuit
Grant 8,995,158 - Weis , et al. March 31, 2
2015-03-31
Method of manufacturing a semiconductor device with device separation structures
Grant 8,987,090 - Lemke , et al. March 24, 2
2015-03-24
Semiconductor device with buried gate electrode structures
Grant 8,980,714 - Lemke , et al. March 17, 2
2015-03-17
Circuit arrangement with a rectifier circuit
Grant 8,971,080 - Weis , et al. March 3, 2
2015-03-03
Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
Grant 8,970,262 - Weis , et al. March 3, 2
2015-03-03
Semiconductor Arrangement with Active Drift Zone
App 20150041915 - Weis; Rolf ;   et al.
2015-02-12
Solid-state Switching Device Having A High-voltage Switching Transistor And A Low-voltage Driver Transistor
App 20150035586 - Weis; Rolf ;   et al.
2015-02-05
Semiconductor Device With Buried Gate Electrode Structures
App 20150008516 - Lemke; Marko ;   et al.
2015-01-08
Method of Manufacturing a Semiconductor Device with Device Separation Structures and Semiconductor Device
App 20150008512 - Lemke; Marko ;   et al.
2015-01-08
Semiconductor Device with Vertical Transistor Channels and a Compensation Structure
App 20150008517 - Mauder; Anton ;   et al.
2015-01-08
Semiconductor Arrangement with Active Drift Zone
App 20150001624 - Weis; Rolf
2015-01-01
Lateral Power Semiconductor Device and Method for Manufacturing a Lateral Power Semiconductor Device
App 20140319610 - Mauder; Anton ;   et al.
2014-10-30
Semiconductor arrangement with active drift zone
Grant 8,866,253 - Weis , et al. October 21, 2
2014-10-21
Power Converter Circuit
App 20140266131 - Deboy; Gerald ;   et al.
2014-09-18
Semiconductor arrangement with active drift zone
Grant 8,759,939 - Weis June 24, 2
2014-06-24
Super Junction Semiconductor Device Comprising a Cell Area and an Edge Area
App 20140117437 - Willmeroth; Armin ;   et al.
2014-05-01
Transistor Device and Method for Producing a Transistor Device
App 20140103439 - Weis; Rolf
2014-04-17
Semiconductor Device Arrangement with a First Semiconductor Device and with a Plurality of Second Semiconductor Devices
App 20140062544 - Weis; Rolf ;   et al.
2014-03-06
Circuit Arrangement with a First Semiconductor Device and with a Plurality of Second Semiconductor Devices
App 20140062585 - Weis; Rolf
2014-03-06
Circuit Arrangement with a Rectifier Circuit
App 20140016386 - Weis; Rolf ;   et al.
2014-01-16
Integrated Circuit With At Least Two Switches
App 20140015592 - Weis; Rolf
2014-01-16
Circuit Arrangement with a Rectifier Circuit
App 20140016361 - Weis; Rolf ;   et al.
2014-01-16
Semiconductor device and method for manufacturing a semiconductor device
Grant 8,598,655 - Schloesser , et al. December 3, 2
2013-12-03
Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger condition
Grant 8,595,449 - Kund , et al. November 26, 2
2013-11-26
Semiconductor Device and Method for Manufacturing a Semiconductor Device
App 20130307059 - Weis; Rolf
2013-11-21
Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices
Grant 8,569,842 - Weis , et al. October 29, 2
2013-10-29
Integrated Switching Device with Parallel Rectifier Element
App 20130264654 - Weis; Rolf ;   et al.
2013-10-10
Semiconductor Arrangement with Active Drift Zone
App 20130193512 - Weis; Rolf
2013-08-01
Semiconductor Arrangement with Active Drift Zone
App 20130193525 - Weis; Rolf ;   et al.
2013-08-01
Transistor arrangement with a first transistor and with a plurality of second transistors
Grant 8,455,948 - Weis June 4, 2
2013-06-04
Transistor Arrangement with a First Transistor and with a Plurality of Second Transistors
App 20120175634 - Weis; Rolf
2012-07-12
Semiconductor Device Arrangement with a First Semiconductor Device and with a Plurality of Second Semiconductor Devices
App 20120175635 - Weis; Rolf ;   et al.
2012-07-12
Phase change memory cell with MOSFET driven bipolar access device
Grant 8,130,537 - Weis March 6, 2
2012-03-06
Reduced-stress through-chip feature and method of making the same
Grant 8,106,511 - Hedler , et al. January 31, 2
2012-01-31
Storage capacitor and method of manufacturing a storage capacitor
Grant 8,093,641 - Weis January 10, 2
2012-01-10
Integrated circuit including U-shaped access device
Grant 7,994,536 - Weis , et al. August 9, 2
2011-08-09
Integrated circuit including U-shaped access device
Grant 7,829,879 - Weis , et al. November 9, 2
2010-11-09
Method of fabricating a semiconductor device
Grant 7,825,031 - Manger , et al. November 2, 2
2010-11-02
Methods for generating sublithographic structures
Grant 7,794,614 - Weis , et al. September 14, 2
2010-09-14
Isolation trenches with conductive plates
Grant 7,795,109 - Weis , et al. September 14, 2
2010-09-14
Integrated circuit device and method of manufacture
Grant 7,763,513 - Wang , et al. July 27, 2
2010-07-27
Method of fabricating an integrated circuit
Grant 7,759,242 - Meyer , et al. July 20, 2
2010-07-20
Method of forming a semiconductor device
Grant 7,754,579 - Wilson , et al. July 13, 2
2010-07-13
Method for forming a structure on a substrate and device
Grant 7,737,049 - Manger , et al. June 15, 2
2010-06-15
Method of producing an integrated circuit having a capacitor with a supporting layer
Grant 7,727,837 - Gruening-von Schwerin , et al. June 1, 2
2010-06-01
Ferroelectric Memory Cell Arrays and Method of Operating the Same
App 20100110753 - Slesazeck; Stefan ;   et al.
2010-05-06
Storage capacitor, a memory device and a method of manufacturing the same
Grant 7,687,343 - Moll , et al. March 30, 2
2010-03-30
Phase Change Memory Cell with MOSFET Driven Bipolar Access Device
App 20100061145 - Weis; Rolf
2010-03-11
Memory Scheduler for Managing Internal Memory Operations
App 20100058018 - Kund; Michael ;   et al.
2010-03-04
Methods for Manufacturing a Structure on a Substrate and Intermediate Product
App 20100048023 - Noelscher; Christoph ;   et al.
2010-02-25
Integrated circuit having a memory cell array and method of forming an integrated circuit
Grant 7,642,572 - Popp , et al. January 5, 2
2010-01-05
Integrated memory cell array
Grant 7,642,586 - Weis January 5, 2
2010-01-05
Isolation Trenches with Conductive Plates
App 20090315090 - Weis; Rolf ;   et al.
2009-12-24
Transistor, memory cell array and method of manufacturing a transistor
Grant 7,635,893 - Weis , et al. December 22, 2
2009-12-22
Manufacturing method for an integrated semiconductor memory device and corresponding semiconductor memory device
Grant 7,605,037 - Weis October 20, 2
2009-10-20
Method for producing a trench transistor and trench transistor
Grant 7,605,032 - Luyken , et al. October 20, 2
2009-10-20
Reduced-Stress Through-Chip Feature and Method of Making the Same
App 20090218690 - Hedler; Harry ;   et al.
2009-09-03
Methods of Double Patterning, Photo Sensitive Layer Stack for Double Patterning and System for Double Patterning
App 20090219496 - Kamm; Frank-Michael ;   et al.
2009-09-03
Integrated Circuit Including U-shaped Access Device
App 20090206316 - Weis; Rolf ;   et al.
2009-08-20
Integrated Circuit Including U-shaped Access Device
App 20090206315 - Weis; Rolf ;   et al.
2009-08-20
Fabricating a memory cell array
Grant 7,569,878 - Weis , et al. August 4, 2
2009-08-04
Method for Processing a Spacer Structure, Method of Manufacturing an Integrated Circuit, Semiconductor Device and Intermediate Structure with at Least One Spacer Structure
App 20090127722 - Noelscher; Christoph ;   et al.
2009-05-21
Integrated Circuit And Method Of Manufacturing An Integrated Circuit
App 20090127608 - Weis; Rolf
2009-05-21
Method of Fabricating a Semiconductor Device
App 20090075462 - Manger; Dirk ;   et al.
2009-03-19
Method of Fabricating an Integrated Circuit
App 20090053892 - Meyer; Steffen ;   et al.
2009-02-26
Method for Forming a Structure on a Substrate and Device
App 20090033362 - Manger; Dirk ;   et al.
2009-02-05
Integrated Circuit With A Split Function Gate
App 20080308870 - Faul; Juergen ;   et al.
2008-12-18
Methods for Manufacturing a Structure on or in a Substrate, Imaging Layer for Generating Sublithographic Structures, Method for Inverting a Sublithographic Pattern, Device Obtainable by Manufacturing a Structure
App 20080296737 - Weis; Rolf ;   et al.
2008-12-04
Method of manufacturing a transistor and a method of forming a memory device with isolation trenches
Grant 7,442,609 - Wang , et al. October 28, 2
2008-10-28
Integrated Circuit Having A Memory Cell Array And Method Of Forming An Integrated Circuit
App 20080253160 - Popp; Martin ;   et al.
2008-10-16
Integrated Circuit Having A Memory
App 20080217672 - Popp; Martin ;   et al.
2008-09-11
Manufacturing method for an integrated semiconductor memory device and corresponding semiconductor memory device
App 20080192526 - Weis; Rolf
2008-08-14
Method Of Producing An Integrated Circuit Having A Capacitor
App 20080182378 - Gruening-von Schwerin; Ulrike ;   et al.
2008-07-31
Storage capacitor, a memory device and a method of manufacturing the same
App 20080128773 - Moll; Peter ;   et al.
2008-06-05
Integrated memory cell array
App 20080061337 - Weis; Rolf
2008-03-13
Integrated transistor device and corresponding manufacturing method
App 20080061363 - Weis; Rolf
2008-03-13
Method of forming a semiconductor device
App 20080044980 - Wilson; Kimberly ;   et al.
2008-02-21
Storage Capacitor And Method Of Manufacturing A Storage Capacitor
App 20080001201 - Weis; Rolf
2008-01-03
Manufacturing method for an integrated semiconductor structure and corresponding semiconductor structure
App 20070290248 - Weis; Rolf
2007-12-20
Dram cell pair and dram memory cell array
Grant 7,301,192 - Harter , et al. November 27, 2
2007-11-27
Storage capacitor and method of manufacturing a storage capacitor
Grant 7,271,058 - Weis September 18, 2
2007-09-18
Transistor, memory cell and method of manufacturing a transistor
App 20070176253 - Wang; Peng-Fei ;   et al.
2007-08-02
Line mask defined active areas for 8F2 DRAM cells with folded bit lines and deep trench patterns
Grant 7,244,980 - Weis , et al. July 17, 2
2007-07-17
Transistor, Meomory Cell Array And Method Of Manufacturing A Transistor
App 20070096182 - Schloesser; Till ;   et al.
2007-05-03
Method of forming a memory cell array and a memory cell array
Grant 7,208,373 - Weis April 24, 2
2007-04-24
Method for producing a trench transistor and trench transistor
App 20070075361 - Luyken; Richard Johannes ;   et al.
2007-04-05
Method of manufacturing a transistor, a method of manufacturing a memory device and transistor
App 20070057301 - Wang; Peng-Fei ;   et al.
2007-03-15
Fabrication method for fabricating a semiconductor structure and semiconductor structure
App 20070037340 - Birner; Albert ;   et al.
2007-02-15
Semiconductor memory apparatus having improved charge retention as a result of bit line shielding
App 20060267158 - Weis; Rolf
2006-11-30
Method of forming a memory cell array and a memory cell array
App 20060270159 - Weis; Rolf
2006-11-30
DRAM cell array and memory cell arrangement having vertical memory cells and methods for fabricating the same
Grant 7,141,845 - Manger , et al. November 28, 2
2006-11-28
Transistor, memory cell array and method of manufacturing a transistor
Grant 7,132,333 - Schloesser , et al. November 7, 2
2006-11-07
Storage capacitor and method of manufacturing a storage capacitor
App 20060160300 - Weis; Rolf
2006-07-20
Method for forming a top oxide with nitride liner
Grant 7,078,290 - Weis July 18, 2
2006-07-18
Method for fabricating a memory cell having a trench
Grant 7,067,372 - Schrems , et al. June 27, 2
2006-06-27
Method of manufacturing a transistor and a method of forming a memory device
App 20060110884 - Wang; Peng-Fei ;   et al.
2006-05-25
Dram cell pair and dram memory cell array
App 20060076602 - Harter; Johann ;   et al.
2006-04-13
Fabricating a memory cell arrangement
App 20060057814 - Weis; Rolf
2006-03-16
Fabricating a memory cell array
App 20060054958 - Weis; Rolf ;   et al.
2006-03-16
Transistor, memory cell array and method of manufacturing a transistor
App 20060056228 - Schloesser; Till ;   et al.
2006-03-16
Transistor, memory cell array and method of manufacturing a transistor
App 20050285153 - Weis, Rolf ;   et al.
2005-12-29
Self-aligned buried strap process using doped HDP oxide
Grant 6,946,345 - Beintner , et al. September 20, 2
2005-09-20
Method for forming a top oxide with nitride liner
App 20050202634 - Weis, Rolf
2005-09-15
Line mask defined active areas for 8F2 dram cells with folded bit lines and deep trench patterns
App 20050176197 - Weis, Rolf ;   et al.
2005-08-11
STI formation for vertical and planar transistors
Grant 6,893,938 - Naeem , et al. May 17, 2
2005-05-17
DRAM cell array having vertical memory cells and methods for fabricating a DRAM cell array and a DRAM
App 20050088895 - Manger, Dirk ;   et al.
2005-04-28
DRAM cell array and memory cell arrangement having vertical memory cells and methods for fabricating the same
App 20050083724 - Manger, Dirk ;   et al.
2005-04-21
Bulk Contact Mask Process
App 20050054158 - Divakaruni, Rama ;   et al.
2005-03-10
Method of forming an alignment mark structure using standard process steps for forming vertical gate transistors
Grant 6,825,096 - Weis November 30, 2
2004-11-30
STI formation for vertical and planar transistors
App 20040209486 - Naeem, Munir D. ;   et al.
2004-10-21
Method of improving etch uniformity in deep silicon etching
Grant 6,806,200 - Dobuzinsky , et al. October 19, 2
2004-10-19
Self-aligned buried strap process using doped HDP oxide
App 20040188740 - Beintner, Jochen ;   et al.
2004-09-30
Process of fabricating DRAM cells with collar isolation layers
Grant 6,797,636 - Tews , et al. September 28, 2
2004-09-28
Method and structures for increasing the structure density and the storage capacitance in a semiconductor wafer
App 20040152317 - Luetzen, Joern ;   et al.
2004-08-05
Method of forming an alignment mark structure using standard process steps for forming vertical gate transistors
App 20040152270 - Weis, Rolf
2004-08-05
Vertical transistor and transistor fabrication method
Grant 6,762,443 - Weis July 13, 2
2004-07-13
Method of preparing buried LOCOS collar in trench DRAMS
App 20040115895 - Tews, Helmut ;   et al.
2004-06-17
Method of improving etch uniformity in deep silicon etching
App 20040092122 - Dobuzinsky, David ;   et al.
2004-05-13
Memory cell having a trench and method for fabricating the memory cell
App 20040079990 - Schrems, Martin ;   et al.
2004-04-29
Method of forming an alignment mark structure using standard process steps for forming vertical gate transistors
Grant 6,713,884 - Weis March 30, 2
2004-03-30
Self-aligned buried strap process using doped HDP oxide
Grant 6,667,504 - Beintner , et al. December 23, 2
2003-12-23
Process of fabricating dram cells with collar isolation layers
App 20030224605 - Tews, Helmut Horst ;   et al.
2003-12-04
Method for forming a single wiring level for transistors with planar and vertical gates on the same substrate
Grant 6,610,573 - Weis August 26, 2
2003-08-26
Method of preparing buried LOCOS collar in trench DRAMS
Grant 6,599,798 - Tews , et al. July 29, 2
2003-07-29
Method of forming an alignment mark structure using standard process steps for forming vertical gate transistors
App 20030119274 - Weis, Rolf
2003-06-26
Vertical transistor and transistor fabrication method
App 20030080346 - Weis, Rolf
2003-05-01
Process Flow For Sacrificial Collar With Polysilicon Void
App 20030077872 - Tews, Helmut Horst ;   et al.
2003-04-24
Method Of Preparing Buried Locos Collar In Trench Drams
App 20030020110 - Tews, Helmut ;   et al.
2003-01-30
Method of preparing buried LOCOS collar in trench DRAMS
App 20030020112 - Tews, Helmut ;   et al.
2003-01-30
Memory cell layout with double gate vertical array transistor
App 20020196651 - Weis, Rolf
2002-12-26
Method for forming a single wiring level for transistors with planar and vertical gates on the same substrate
App 20020197801 - Weis, Rolf
2002-12-26
Memory cell configuration
Grant 6,496,401 - Weis December 17, 2
2002-12-17
Memory cell with trench capacitor and method of fabricating the memory cell
Grant 6,420,239 - Weis July 16, 2
2002-07-16
Self-aligned nitride pattern for improved process window
App 20020076884 - Weis, Rolf
2002-06-20
Memory cell configuration
App 20020005535 - Weis, Rolf
2002-01-17
Memory cell with trench capacitor and method of fabricating the memory cell
App 20020004271 - Weis, Rolf
2002-01-10
Memory cell with trench, and method for production thereof
App 20010030337 - Weis, Rolf
2001-10-18

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