Wedlake; Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wedlake; Michael.The latest application filed is for "finfet device with a substantially self-aligned isolation region positioned under the channel region".

Company Profile

0.6.9

Wedlake; Michael - Austin TX
Wedlake; Michael - Albany NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods and systems for chemical mechanical planarization endpoint detection using an alternating current reference signal Grant 10,343,253 - Bello , et al. July 9, 2	2019-07-09
Finfet Device With A Substantially Self-aligned Isolation Region Positioned Under The Channel Region App 20160190306 - Xie; Ruilong ; et al.	2016-06-30
Methods of forming substantially self-aligned isolation regions on FinFET semiconductor devices and the resulting devices Grant 9,318,388 - Xie , et al. April 19, 2	2016-04-19
Integrated Circuit Product With A Gate Height Registration Structure App 20160005733 - Xie; Ruilong ; et al.	2016-01-07
Methods And Systems For Chemical Mechanical Planarization Endpoint Detection Using An Alternating Current Reference Signal App 20150371912 - Bello; Abner ; et al.	2015-12-24
Methods of forming replacement gate structures using a gate height register process to improve gate height uniformity and the resulting integrated circuit products Grant 9,165,836 - Xie , et al. October 20, 2	2015-10-20
Methods Of Forming Substantially Self-aligned Isolation Regions On Finfet Semiconductor Devices And The Resulting Devices App 20150294912 - Xie; Ruilong ; et al.	2015-10-15
Methods Of Forming Replacement Gate Structures Using A Gate Height Register Process To Improve Gate Height Uniformity And The Resulting Integrated Circuit Products App 20150279742 - Xie; Ruilong ; et al.	2015-10-01
Methods And Systems For Vibratory Chemical Mechanical Planarization App 20150228511 - Wedlake; Michael	2015-08-13
Methods of forming substantially self-aligned isolation regions on FinFET semiconductor devices and the resulting devices Grant 9,093,302 - Xie , et al. July 28, 2	2015-07-28
Methods Of Forming Substantially Self-aligned Isolation Regions On Finfet Semiconductor Devices And The Resulting Devices App 20150129934 - Xie; Ruilong ; et al.	2015-05-14
Processes for forming electronic devices including polishing metal-containing layers Grant 8,232,209 - Brannon , et al. July 31, 2	2012-07-31
Processes For Forming Electronic Devices Including Polishing Metal-containing Layers App 20110136268 - Brannon; Christopher E. ; et al.	2011-06-09
Processes for forming electronic devices including polishing metal-containing layers Grant 7,915,169 - Brannon , et al. March 29, 2	2011-03-29
Processes For Forming Electronic Devices Including Polishing Metal-containing Layers App 20090117734 - Brannon; Christopher E. ; et al.	2009-05-07

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