loadpatents
name:-0.013613939285278
name:-0.024476766586304
name:-0.0005030632019043
Weber; Larren G. Patent Filings

Weber; Larren G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Weber; Larren G..The latest application filed is for "apparatuses and methods for power efficient driver circuits".

Company Profile
0.22.14
  • Weber; Larren G. - Caldwell ID
  • Weber; Larren G. - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Apparatuses and methods for power efficient driver circuits
Grant 10,825,485 - Hollis , et al. November 3, 2
2020-11-03
Apparatuses And Methods For Power Efficient Driver Circuits
App 20190295607 - Hollis; Timothy M. ;   et al.
2019-09-26
Apparatuses and methods for power efficient driver circuits
Grant 10,381,050 - Hollis , et al. A
2019-08-13
Apparatuses And Methods For Power Efficient Driver Circuits
App 20180130508 - Hollis; Timothy M. ;   et al.
2018-05-10
Apparatuses and methods for power efficient driver circuits
Grant 9,911,469 - Hollis , et al. March 6, 2
2018-03-06
High speed, low power CMOS logic gate
Grant 7,285,986 - Lovett , et al. October 23, 2
2007-10-23
High speed, low power CMOS logic gate
App 20070040585 - Lovett; Simon J. ;   et al.
2007-02-22
Upward and downward pulse stretcher circuits and modules
Grant 7,046,038 - Porter , et al. May 16, 2
2006-05-16
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges, circuits and systems including same
Grant 6,982,572 - Porter , et al. January 3, 2
2006-01-03
Method for rapidly propagating a fast edge of an output signal through a skewed logic device
Grant 6,972,589 - Porter , et al. December 6, 2
2005-12-06
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
Grant 6,949,948 - Porter , et al. September 27, 2
2005-09-27
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
Grant 6,937,066 - Porter , et al. August 30, 2
2005-08-30
Skewed nor and nand rising logic devices for rapidly propagating a rising edge of an output signal
Grant 6,919,735 - Porter , et al. July 19, 2
2005-07-19
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and systems including same
Grant 6,917,222 - Porter , et al. July 12, 2
2005-07-12
Skewed falling logic device for rapidly propagating a falling edge of an output signal
Grant 6,891,398 - Porter , et al. May 10, 2
2005-05-10
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
Grant 6,724,218 - Porter , et al. April 20, 2
2004-04-20
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
Grant 6,628,139 - Porter , et al. September 30, 2
2003-09-30
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
App 20030132782 - Porter, John D. ;   et al.
2003-07-17
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
App 20030102896 - Porter, John D. ;   et al.
2003-06-05
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges, circuits and systems including same
App 20030098713 - Porter, John D. ;   et al.
2003-05-29
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and methods including same
App 20030098718 - Porter, John D. ;   et al.
2003-05-29
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
App 20030098717 - Porter, John D. ;   et al.
2003-05-29
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
App 20030098716 - Porter, John D. ;   et al.
2003-05-29
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
App 20030098719 - Porter, John D. ;   et al.
2003-05-29
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and systems including same
App 20030094973 - Porter, John D. ;   et al.
2003-05-22
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges
App 20030094972 - Porter, John D. ;   et al.
2003-05-22
Digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges and methods, circuits and systems including same
App 20030025527 - Porter, John D. ;   et al.
2003-02-06
Method for buffering an input signal
App 20020024360 - Porter, John D. ;   et al.
2002-02-28
Method and apparatus for registering free flow information
Grant 6,301,188 - Weber , et al. October 9, 2
2001-10-09
Buffer with fast edge propagation
Grant 6,239,618 - Porter , et al. May 29, 2
2001-05-29
Method and apparatus for accessing one of a plurality of memory units within an electronic memory device
Grant 6,128,244 - Thompson , et al. October 3, 2
2000-10-03
Method for circuits connection for wafer level burning and testing of individual dies on semiconductor wafer
Grant 5,483,175 - Ahmad , et al. January 9, 1
1996-01-09
Semiconductor array having built-in test circuit for wafer level testing
Grant 5,457,400 - Ahmad , et al. October 10, 1
1995-10-10
Fixture for burn-in testing of semiconductor wafers, and a semiconductor wafer
Grant 5,424,651 - Green , et al. June 13, 1
1995-06-13
Timing and control circuit for a static RAM responsive to an address transition pulse
Grant 5,327,394 - Green , et al. July 5, 1
1994-07-05
Built-in test circuit connection for wafer level burnin and testing of individual dies
Grant 5,241,266 - Ahmad , et al. August 31, 1
1993-08-31

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