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Prefetch mechanism for use in a system including a host connected to a plurality of memory modules via a serial memory interconnect
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System including a host connected to a plurality of memory modules via a serial memory interconnet
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External locking mechanism for personal computer memory locations
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Flexible implementation of a system management mode (SMM) in a processor
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Multiprocessor digital data processing system
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System and method for conditional moving an operand from a source register to destination register
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Method and apparatus for rounding in a multiplier arithmetic
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Load and store instructions which perform unpacking and packing of data bits in separate vector and integer cache storage
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Decoding operands for multimedia applications instruction coded with less number of bits than combination of register slots and selectable specific values
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Microprocessor modified to perform inverse discrete cosine transform operations on a one-dimensional matrix of numbers within a minimal number of instructions
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Converting register data from a first format type to a second format type if a second type instruction consumes data produced by a first type instruction
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Flexible implementation of a system management mode (SMM) in a processor
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System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot
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Multiprocessor digital data processing system/shared memory multiprocessor system and method of operation
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System and method for conditionally moving an operand from a source register to a destination register
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System for inserting instructions into processor instruction stream in order to perform interrupt processing
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Computer modified to perform inverse discrete cosine transform operations on a one-dimensional matrix of numbers within a minimal number of instruction cycles
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Shared memory multiprocessor system and method of operation thereof
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Multiprocessor digital data processing system
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