Watanabe; Shigeyoshi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Watanabe; Shigeyoshi.The latest application filed is for "cruise control system using instruction sent from switch".

Company Profile

0.19.2

Watanabe; Shigeyoshi - Oobu JP
Watanabe; Shigeyoshi - Oobu-shi JP
Watanabe, Shigeyoshi - Ehime JP
Watanabe; Shigeyoshi - Yokohama JP
Watanabe; Shigeyoshi - Tokyo JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Cruise control system using instruction sent from switch Grant 8,204,670 - Watanabe June 19, 2	2012-06-19
Cruise control system using instruction sent from switch App 20080023241 - Watanabe; Shigeyoshi	2008-01-31
Protective garment against molten metal App 20040203310 - Watanabe, Shigeyoshi ; et al.	2004-10-14
NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines Grant 5,892,724 - Hasegawa , et al. April 6, 1	1999-04-06
Dynamic random access memory device with the combined open/folded bit-line pair arrangement Grant 5,555,519 - Takashima , et al. September 10, 1	1996-09-10
Non-volatile semiconductor memory with NAND cell structure and switching transistors with different channel lengths to reduce punch-through Grant 5,508,957 - Momodomi , et al. April 16, 1	1996-04-16
Semiconductor memory device having register groups for writing and reading data Grant 5,467,303 - Hasegawa , et al. November 14, 1	1995-11-14
Semiconductor device with vertical transistors connected in series between bit lines Grant 5,416,350 - Watanabe May 16, 1	1995-05-16
Dynamic random access memory device with the combined open/folded bit-line pair arrangement Grant 5,396,450 - Takashima , et al. March 7, 1	1995-03-07
Dynamic semiconductor memory device having high integration density Grant 5,363,325 - Sunouchi , et al. November 8, 1	1994-11-08
Electrically erasable programmable read-only memory with NAND memory cell structure Grant 5,088,060 - Endoh , et al. February 11, 1	1992-02-11
Semiconductor memory device Grant 5,038,191 - Hasegawa , et al. August 6, 1	1991-08-06
Electrically erasable programmable read-only memory with NAND memory cell structure Grant 4,996,669 - Endoh , et al. February 26, 1	1991-02-26
Semiconductor device Grant 4,831,433 - Oguara , et al. May 16, 1	1989-05-16
High-speed refreshing rechnique for highly-integrated random-access memory Grant 4,819,207 - Sakui , et al. April 4, 1	1989-04-04
Semiconductor memory device Grant 4,811,290 - Watanabe March 7, 1	1989-03-07
Semiconductor memory system with dynamic random access memory cells Grant 4,800,530 - Itoh , et al. January 24, 1	1989-01-24
Word line driver for use in a semiconductor memory Grant 4,798,977 - Sakui , et al. January 17, 1	1989-01-17
Divided-bit line type dynamic semiconductor memory with main and sub-sense amplifiers Grant 4,777,625 - Sakui , et al. October 11, 1	1988-10-11
Dynamic semiconductor memory device Grant 4,733,374 - Furuyama , et al. March 22, 1	1988-03-22
Semiconductor nonvolatile read only memory device Grant 4,531,202 - Watanabe , et al. July 23, 1	1985-07-23

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