| Patent | Date |
|---|
Operating pulsed latches on a variable power supply
Grant 11,112,854 - Douskey , et al. September 7, 2 | 2021-09-07 |
Priority based circuit synthesis
Grant 10,678,981 - Ankenapalli , et al. | 2020-06-09 |
Pessimism reduction in cross-talk noise determination used in integrated circuit design
Grant 10,565,336 - Morsey , et al. Feb | 2020-02-18 |
Pessimism Reduction In Cross-talk Noise Determination Used In Integrated Circuit Design
App 20190362045 - Morsey; Jason D. ; et al. | 2019-11-28 |
Operating Pulsed Latches On A Variable Power Supply
App 20190286221 - DOUSKEY; STEVEN M. ; et al. | 2019-09-19 |
Operating pulsed latches on a variable power supply
Grant 10,386,912 - Douskey , et al. A | 2019-08-20 |
Programmable clock division methodology with in-context frequency checking
Grant 10,354,046 - Abdul , et al. July 16, 2 | 2019-07-16 |
Debugging scan latch circuits using flip devices
Grant 10,288,678 - Warnock | 2019-05-14 |
Adjusting scan connections based on scan control locations
Grant 10,216,885 - GopalaKrishnaSetty , et al. Feb | 2019-02-26 |
Priority Based Circuit Synthesis
App 20190034563 - Ankenapalli; Vijay K. ; et al. | 2019-01-31 |
On-chip sensor for monitoring active circuits on integrated circuit (IC) chips
Grant 10,191,108 - Freeman , et al. Ja | 2019-01-29 |
Priority based circuit synthesis
Grant 10,133,840 - Ankenapalli , et al. November 20, 2 | 2018-11-20 |
Programmable integrated circuit standard cell
Grant 10,062,709 - Datta , et al. August 28, 2 | 2018-08-28 |
Operating Pulsed Latches On A Variable Power Supply
App 20180196497 - DOUSKEY; STEVEN M. ; et al. | 2018-07-12 |
Programmable integrated circuit standard cell
Grant 10,002,881 - Datta , et al. June 19, 2 | 2018-06-19 |
Early analysis and mitigation of self-heating in design flows
Grant 9,990,454 - Dhanwada , et al. June 5, 2 | 2018-06-05 |
Programmable delay circuit including hybrid fin field effect transistors (finFETs)
Grant 9,985,616 - Ankenapalli , et al. May 29, 2 | 2018-05-29 |
Adjusting Scan Connections Based On Scan Control Locations
App 20180096091 - GopalaKrishnaSetty; Raghu G. ; et al. | 2018-04-05 |
Adjusting scan connections based on scan control locations
Grant 9,934,348 - GopalaKrishnaSetty , et al. April 3, 2 | 2018-04-03 |
Programmable Integrated Circuit Standard Cell
App 20180090513 - Datta; Ayan ; et al. | 2018-03-29 |
Programmable Integrated Circuit Standard Cell
App 20180090514 - Datta; Ayan ; et al. | 2018-03-29 |
Programmable Clock Division Methodology With In-context Frequency Checking
App 20180068051 - Abdul; Naiju K. ; et al. | 2018-03-08 |
Programmable clock division methodology with in-context frequency checking
Grant 9,910,954 - Abdul , et al. March 6, 2 | 2018-03-06 |
Performance-screen ring oscillator (PSRO) using an integrated circuit test signal distribution network
Grant 9,891,276 - Warnock February 13, 2 | 2018-02-13 |
Early Analysis And Mitigation Of Self-heating In Design Flows
App 20170351785 - Dhanwada; Nagashyamala R. ; et al. | 2017-12-07 |
Programmable Clock Division Methodology With In-context Frequency Checking
App 20170344693 - Abdul; Naiju K. ; et al. | 2017-11-30 |
Validating variation of timing constraint measurements
Grant 9,760,664 - Gupta , et al. September 12, 2 | 2017-09-12 |
Initializing scannable and non-scannable latches from a common clock buffer
Grant 9,762,212 - Huott , et al. September 12, 2 | 2017-09-12 |
Validating variation of timing constraint measurements
Grant 9,760,665 - Gupta , et al. September 12, 2 | 2017-09-12 |
Initializing scannable and non-scannable latches from a common clock buffer
Grant 9,762,213 - Huott , et al. September 12, 2 | 2017-09-12 |
Performance-screen ring oscillator (PSRO) using an integrated circuit test signal distribution network
Grant 9,720,035 - Warnock August 1, 2 | 2017-08-01 |
Adjusting Scan Connections Based On Scan Control Locations
App 20170177777 - GopalaKrishnaSetty; Raghu G. ; et al. | 2017-06-22 |
Priority Based Circuit Synthesis
App 20170161406 - Ankenapalli; Vijay K. ; et al. | 2017-06-08 |
Debugging scan latch circuits using flip devices
Grant 9,664,735 - Warnock May 30, 2 | 2017-05-30 |
On-chip Sensor For Monitoring Active Circuits On Integrated Circuit (ic) Chips
App 20170146592 - Freeman; Gregory G. ; et al. | 2017-05-25 |
Debugging Scan Latch Circuits Using Flip Devices
App 20170131353 - WARNOCK; James D. | 2017-05-11 |
Programmable Delay Circuit Including Hybrid Fin Field Effect Transistors (finfets)
App 20170126218 - Ankenapalli; Vijay K. ; et al. | 2017-05-04 |
Debugging scan latch circuits using flip devices
Grant 9,618,580 - Warnock April 11, 2 | 2017-04-11 |
Programmable delay circuit including hybrid fin field effect transistors (finFETs)
Grant 9,614,507 - Ankenapalli , et al. April 4, 2 | 2017-04-04 |
Debugging Scan Latch Circuits Using Flip Devices
App 20170089977 - Warnock; James D. | 2017-03-30 |
Voltage droop reduction in a processor
Grant 9,575,529 - Curran , et al. February 21, 2 | 2017-02-21 |
Performance-screen Ring Oscillator (psro) Using An Integrated Circuit Test Signal Distribution Network
App 20170030968 - Warnock; James D. | 2017-02-02 |
Performance-screen Ring Oscillator (psro) Using An Integrated Circuit Test Signal Distribution Network
App 20170030967 - Warnock; James D. | 2017-02-02 |
Method for an efficient modeling of the impact of device-level self-heating on electromigration limited current specifications
Grant 9,552,455 - Poindexter , et al. January 24, 2 | 2017-01-24 |
Validating Variation of Timing Constraint Measurements
App 20170011154 - GUPTA; SACHIN K. ; et al. | 2017-01-12 |
Validating Variation of Timing Constraint Measurements
App 20170011153 - GUPTA; SACHIN K. ; et al. | 2017-01-12 |
Programmable Delay Circuit Including Hybrid Fin Field Effect Transistors (finfets)
App 20170012615 - Ankenapalli; Vijay K. ; et al. | 2017-01-12 |
Programmable Delay Circuit Including Hybrid Fin Field Effect Transistors (finfets)
App 20170012616 - Ankenapalli; Vijay K. ; et al. | 2017-01-12 |
Programmable delay circuit including hybrid fin field effect transistors (finFETs)
Grant 9,543,935 - Ankenapalli , et al. January 10, 2 | 2017-01-10 |
Signal distribution in integrated circuit using optical through silicon via
Grant 9,543,463 - Leobandung , et al. January 10, 2 | 2017-01-10 |
Clock skew analysis and optimization
Grant 9,494,968 - Restle , et al. November 15, 2 | 2016-11-15 |
Signal distribution in integrated circuit using optical through silicon via
Grant 9,496,447 - Leobandung , et al. November 15, 2 | 2016-11-15 |
Debugging Scan Latch Circuits Using Flip Devices
App 20160327608 - Warnock; James D. | 2016-11-10 |
Method for an Efficient Modeling of the Impact of Device-Level Self-Heating on Electromigration Limited Current Specifications
App 20160224717 - Poindexter; Daniel J. ; et al. | 2016-08-04 |
Signal Distribution In Integrated Circuit Using Optical Through Silicon Via
App 20160118528 - Leobandung; Effendi ; et al. | 2016-04-28 |
Signal Distribution In Integrated Circuit Using Optical Through Silicon Via
App 20160118529 - Leobandung; Effendi ; et al. | 2016-04-28 |
Voltage Droop Reduction In A Processor
App 20160098070 - CURRAN; Brian W. ; et al. | 2016-04-07 |
Margin improvement for configurable local clock buffer
Grant 9,088,279 - Fleischer , et al. July 21, 2 | 2015-07-21 |
Margin Improvement For Configurable Local Clock Buffer
App 20150084673 - Fleischer; Bruce M. ; et al. | 2015-03-26 |
Power grid generation through modification of an initial power grid based on power grid analysis
Grant 8,914,765 - Sigal , et al. December 16, 2 | 2014-12-16 |
Optimal spare latch selection for metal-only ECOs
Grant 8,875,084 - Ankenapalli , et al. October 28, 2 | 2014-10-28 |
Power Grid Design For Integrated Circuits
App 20140201695 - Sigal; Leon J. ; et al. | 2014-07-17 |
Clock Skew Analysis And Optimization
App 20140201561 - Restle; Phillip J. ; et al. | 2014-07-17 |
Continuous Via For Power Grid
App 20140138842 - Warnock; James D. | 2014-05-22 |
Continuous Via For Power Grid
App 20140141607 - Warnock; James D. | 2014-05-22 |
Device-based random variability modeling in timing analysis
Grant 8,589,842 - Bhushan , et al. November 19, 2 | 2013-11-19 |
Apparatus and method for hardening latches in SOI CMOS devices
Grant 8,354,858 - Cannon , et al. January 15, 2 | 2013-01-15 |
Apparatus And Method For Hardening Latches In Soi Cmos Devices
App 20110102042 - Cannon; Ethan H. ; et al. | 2011-05-05 |
Apparatus and method for hardening latches in SOI CMOS devices
Grant 7,888,959 - Cannon , et al. February 15, 2 | 2011-02-15 |
Programmable local clock buffer
Grant 7,719,315 - Ngo , et al. May 18, 2 | 2010-05-18 |
Structure for a configurable low power high fan-in multiplexer
Grant 7,693,701 - Chiang , et al. April 6, 2 | 2010-04-06 |
Transmission gate multiplexer
Grant 7,633,316 - Chiang , et al. December 15, 2 | 2009-12-15 |
Low-power multi-output local clock buffer
Grant 7,589,565 - Sigal , et al. September 15, 2 | 2009-09-15 |
LSSD compatibility for GSD unified global clock buffers
App 20090199036 - Warnock; James D. ; et al. | 2009-08-06 |
Low-power Multi-output Local Clock Buffer
App 20090199038 - Sigal; Leon J. ; et al. | 2009-08-06 |
Apparatus And Method For Hardening Latches In Soi Cmos Devices
App 20090134925 - Cannon; Ethan H. ; et al. | 2009-05-28 |
Structure for Transmission Gate Multiplexer
App 20090096486 - Chiang; Owen ; et al. | 2009-04-16 |
Transmission Gate Multiplexer
App 20090072863 - Chiang; Owen ; et al. | 2009-03-19 |
Transmission gate multiplexer
Grant 7,466,165 - Chiang , et al. December 16, 2 | 2008-12-16 |
Method and apparatus for a configurable low power high fan-in multiplexer
Grant 7,466,164 - Chiang , et al. December 16, 2 | 2008-12-16 |
Structure For A Configurable Low Power High Fan-in Multiplexer
App 20080303554 - CHIANG; Owen ; et al. | 2008-12-11 |
Method And Apparatus For A Configurable Low Power High Fan-in Multiplexer
App 20080303553 - CHIANG; OWEN ; et al. | 2008-12-11 |
Pulsed local clock buffer (LCB) characterization ring oscillator
Grant 7,459,950 - Ngo , et al. December 2, 2 | 2008-12-02 |
Scannable dynamic logic latch circuit
Grant 7,372,305 - Ngo , et al. May 13, 2 | 2008-05-13 |
Pulsed Local Clock Buffer (lcb) Characterization Ring Oscillator
App 20080100360 - Ngo; Hung C. ; et al. | 2008-05-01 |
Leakage power estimation
App 20080103708 - Inoue; Takeshi ; et al. | 2008-05-01 |
Programmable Local Clock Buffer
App 20080101522 - Ngo; Hung C. ; et al. | 2008-05-01 |
Scannable Dynamic Logic Latch Circuit
App 20080100344 - Ngo; Hung C. ; et al. | 2008-05-01 |
Parameterized Semiconductor Chip Cells And Optimization Of The Same
App 20080077889 - Behnen; Erwin ; et al. | 2008-03-27 |
Methods for modeling latch transparency
Grant 7,225,419 - Behnen , et al. May 29, 2 | 2007-05-29 |
High-speed level sensitive scan design test scheme with pipelined test clocks
Grant 7,178,075 - Warnock , et al. February 13, 2 | 2007-02-13 |
High-speed Level Sensitive Scan Design Test Scheme With Pipelined Test Clocks
App 20060242506 - Warnock; James D. ; et al. | 2006-10-26 |
Parallel field effect transistor structure having a body contact
Grant 7,084,462 - Warnock , et al. August 1, 2 | 2006-08-01 |
Methods for modeling latch transparency
Grant 7,080,335 - Behnen , et al. July 18, 2 | 2006-07-18 |
Method And Structure For Connecting Ground/power Networks To Prevent Charge Damage In Silicon On Insulator
App 20050242439 - DeVries, Kenneth L. ; et al. | 2005-11-03 |
Methods for modeling latch transparency
App 20050071790 - Behnen, Erwin ; et al. | 2005-03-31 |
Methods for modeling latch transparency
App 20050071794 - Behnen, Erwin ; et al. | 2005-03-31 |
Methods and apparatus for operating master-slave latches
Grant 6,822,500 - Warnock , et al. November 23, 2 | 2004-11-23 |
Reduced pessimism clock gating tests for a timing analysis tool
Grant 6,718,523 - Hathaway , et al. April 6, 2 | 2004-04-06 |
Reduced pessimism clock gating tests for a timing analysis tool
App 20030009733 - Hathaway, David J. ; et al. | 2003-01-09 |
Dynamic and preset static multiplexer in front of latch circuit for use in static circuits
Grant 5,543,731 - Sigal , et al. August 6, 1 | 1996-08-06 |
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