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name:-0.0057289600372314
name:-0.00076818466186523
Warnock; James Patent Filings

Warnock; James

Patent Applications and Registrations

Patent applications and USPTO patent grants for Warnock; James.The latest application filed is for "regular local clock buffer placement and latch clustering by iterative optimization".

Company Profile
0.4.4
  • Warnock; James - Somers NY
  • Warnock; James - Seattle WA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Regular local clock buffer placement and latch clustering by iterative optimization
Grant 8,104,014 - Puri , et al. January 24, 2
2012-01-24
Pulse waveform timing in EinsTLT templates
Grant 7,643,981 - Lee , et al. January 5, 2
2010-01-05
Regular Local Clock Buffer Placement And Latch Clustering By Iterative Optimization
App 20090193377 - Puri; Ruchir ;   et al.
2009-07-30
Method and system for controlling a complementary user interface on a display surface
Grant 7,340,682 - Nason , et al. March 4, 2
2008-03-04
Pulse waveform timing in EinsTLT templates
App 20060020443 - Lee; Sang Y. ;   et al.
2006-01-26
Method and system for controlling a complementary user interface on a display surface
App 20040032423 - Nason, D. David ;   et al.
2004-02-19
Method and system for controlling a complementary user interface on a display surface
App 20040027387 - Nason, D. David ;   et al.
2004-02-12
Method and system for controlling a complementary user interface on a display surface
Grant 6,630,943 - Nason , et al. October 7, 2
2003-10-07

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