Wang; Wen-chou Vincent

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Wen-chou Vincent.The latest application filed is for "multi-chip module and method for forming and method for deplating defective capacitors".

Company Profile

0.38.9

Wang; Wen-chou Vincent - Cupertino CA
Wang; Wen-chou Vincent - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate Grant 7,741,160 - Wang , et al. June 22, 2	2010-06-22
Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate Grant 7,585,702 - Wang , et al. September 8, 2	2009-09-08
Structure, material, and design for assembling a low-K Si die to achieve an industrial grade reliability wire bonding package Grant 7,427,813 - Wang , et al. September 23, 2	2008-09-23
Pad surface finish for high routing density substrate of BGA packages Grant 7,148,569 - Wang December 12, 2	2006-12-12
Structure and material for assembling a low-K Si die to achieve a low warpage and industrial grade reliability flip chip package with organic substrate Grant 7,144,756 - Wang , et al. December 5, 2	2006-12-05
Flip chip package with warpage control Grant 6,949,404 - Fritz , et al. September 27, 2	2005-09-27
Structure and material for assembling a low-K Si die to achieve a low warpage and industrial grade reliability flip chip package with organic substrate Grant 6,909,176 - Wang , et al. June 21, 2	2005-06-21
Multi-chip module and method for forming and method for deplating defective capacitors Grant 6,882,045 - Massingill , et al. April 19, 2	2005-04-19
Multi-layer opto-electronic substrates with electrical and optical interconnections and methods for making Grant 6,845,184 - Yoshimura , et al. January 18, 2	2005-01-18
Single and multilayer waveguides and fabrication process Grant 6,785,447 - Yoshimura , et al. August 31, 2	2004-08-31
Integrated assembly-underfill flip chip process Grant 6,773,958 - Wang August 10, 2	2004-08-10
Methods of planarizing structures on wafers and substrates by polishing Grant 6,733,685 - Beilin , et al. May 11, 2	2004-05-11
Optical reflective structures and method for making Grant 6,706,546 - Yoshimura , et al. March 16, 2	2004-03-16
Three-dimensional opto-electronic modules with electrical and optical interconnections and methods for making Grant 6,690,845 - Yoshimura , et al. February 10, 2	2004-02-10
Optical coupling structures and the fabrication processes Grant 6,684,007 - Yoshimura , et al. January 27, 2	2004-01-27
Device transfer method Grant 6,669,801 - Yoshimura , et al. December 30, 2	2003-12-30
Method of fabricating a substrate with a via connection Grant 6,662,443 - Chou , et al. December 16, 2	2003-12-16
Opto-electronic substrates with electrical and optical interconnections and methods for making Grant 6,611,635 - Yoshimura , et al. August 26, 2	2003-08-26
Multi-chip module and method for forming and method for deplating defective capacitors App 20020155661 - Massingill, Thomas J. ; et al.	2002-10-24
Reduced stress and zero stress interposers for integrated-circuit chips, multichip substrates, and the like Grant 6,444,921 - Wang , et al. September 3, 2	2002-09-03
Three dimensional packaging App 20020117753 - Lee, Michael G. ; et al.	2002-08-29
Multilayer interconnection and method App 20020104873 - Lee, Michael G. ; et al.	2002-08-08
Multilayer circuit structure build up method Grant 6,428,942 - Jiang , et al. August 6, 2	2002-08-06
Single and multilayer waveguides and fabrication process App 20020097962 - Yoshimura, Tetsuzo ; et al.	2002-07-25
Optical reflective structures and method for making App 20020039464 - Yoshimura, Tetsuzo ; et al.	2002-04-04
Device transfer method App 20020036055 - Yoshimura, Tetsuzo ; et al.	2002-03-28
Optical coupling structures and the fabrication processes App 20020028045 - Yoshimura, Tetsuzo ; et al.	2002-03-07
Systems based on opto-electronic substrates with electrical and optical interconnections and methods for making Grant 6,343,171 - Yoshimura , et al. January 29, 2	2002-01-29
Method of fabricating a substrate with a via connection App 20020000037 - Chou, William T. ; et al.	2002-01-03
Methods of planarizing structures on wafers and substrates by polishing App 20010042734 - Beilin, Solomon I. ; et al.	2001-11-22
Reduced cross-talk noise high density signal interposer with power and ground wrap Grant 6,239,485 - Peters , et al. May 29, 2	2001-05-29
Method of fabrication of multiple-layer high density substrate Grant 6,187,652 - Chou , et al. February 13, 2	2001-02-13
Flip chip pre-assembly underfill process Grant 6,168,972 - Wang , et al. January 2, 2	2001-01-02
Controlled impedance interposer substrate and method of making Grant 6,102,710 - Beilin , et al. August 15, 2	2000-08-15
High density signal interposer with power and ground wrap Grant 6,081,026 - Wang , et al. June 27, 2	2000-06-27
Chip and board stress relief interposer Grant 6,050,832 - Lee , et al. April 18, 2	2000-04-18
Pattern or via structure formed through supplemental electron beam exposure and development to remove image residue Grant 5,942,373 - Chou , et al. August 24, 1	1999-08-24
Methods of planarizing structures on wafers and substrates by polishing Grant 5,916,453 - Beilin , et al. June 29, 1	1999-06-29
Methods of etching through wafers and substrates with a composite etch stop layer Grant 5,891,354 - Lee , et al. April 6, 1	1999-04-06
Controlled impedence interposer substrate Grant 5,854,534 - Beilin , et al. December 29, 1	1998-12-29
High-yield methods of fabricating large substrate capacitors Grant 5,817,533 - Sen , et al. October 6, 1	1998-10-06
Method of forming a pattern or via structure utilizing supplemental electron beam exposure and development to remove image residue Grant 5,789,140 - Chou , et al. August 4, 1	1998-08-04
Method of making a multichip module substrate Grant 5,778,529 - Beilin , et al. July 14, 1	1998-07-14
Fabrication procedure for a stable post Grant 5,722,162 - Chou , et al. March 3, 1	1998-03-03
Electron-beam treatment procedure for patterned mask layers Grant 5,660,957 - Chou , et al. August 26, 1	1997-08-26
Method for making a three-dimensional multichip module Grant 5,655,290 - Moresco , et al. August 12, 1	1997-08-12
Substrate with thin film capacitor and insulating plug Grant 5,652,693 - Chou , et al. July 29, 1	1997-07-29

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