Wang; Mam-Tsung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Mam-Tsung.The latest application filed is for "light source assembly, optical sensor assembly, and method of manufacturing a cell of the same".

Company Profile

0.16.4

Wang; Mam-Tsung - Hsinchu TW
Wang; Mam-Tsung - Hsin-Chu TW
Wang; Mam-Tsung - Hsing Chu TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Light-emitting diode (LED) assembly and method of manufacturing an LED cell of the same Grant 11,322,542 - Pan , et al. May 3, 2	2022-05-03
Light Source Assembly, Optical Sensor Assembly, And Method Of Manufacturing A Cell Of The Same App 20210305449 - WANG; MAM-TSUNG ; et al.	2021-09-30
Light-emitting Diode (led) Assembly And Method Of Manufacturing An Led Cell Of The Same App 20210305313 - PAN; SHYI-MING ; et al.	2021-09-30
Current source component with process tracking characteristics for compact programmed Vt distribution of flash EPROM Grant 6,614,687 - Chen , et al. September 2, 2	2003-09-02
Current Source Component With Process Tracking Characteristics For Compact Programmed Vt Distribution Of Flash Eprom App 20020163835 - Chen, Ming-Shang ; et al.	2002-11-07
Process and integrated circuit for a multilevel memory cell with an asymmetric drain App 20020034854 - Lu, Tao Cheng ; et al.	2002-03-21
Multi-level memory cell device and method for self-converged programming Grant 6,215,697 - Lu , et al. April 10, 2	2001-04-10
8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate Grant 6,204,529 - Lung , et al. March 20, 2	2001-03-20
Method for fast programming of EPROMS and multi-level flash EPROMS Grant 6,181,604 - Lu , et al. January 30, 2	2001-01-30
Method of forming a binary code of a ROM Grant 6,166,943 - Wang , et al. December 26, 2	2000-12-26
Self protected stacked NMOS with non-silicided region to protect mixed-voltage I/O pad from ESD damage Grant 6,140,682 - Liu , et al. October 31, 2	2000-10-31
Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication Grant 6,130,452 - Lu , et al. October 10, 2	2000-10-10
Method for programming an analog/multi-level flash EEPROM Grant 6,040,993 - Chen , et al. March 21, 2	2000-03-21
Method and device for programming a non-volatile memory cell by controlling source current pulldown rate Grant 6,028,790 - Lin , et al. February 22, 2	2000-02-22
Method of forming an asymmetric bird's beak cell for a flash EEPROM Grant 5,963,808 - Lu , et al. October 5, 1	1999-10-05
Apparatus and method for programming virtual ground EPROM array cell without disturbing adjacent cells Grant 5,959,892 - Lin , et al. September 28, 1	1999-09-28
Method and circuit for substrate current induced hot e.sup.- injection (SCIHE) approach for V.sub.T convergence at low V.sub.CC voltage Grant 5,912,845 - Chen , et al. June 15, 1	1999-06-15
Method for flash EEPROM data writing Grant 5,912,844 - Chen , et al. June 15, 1	1999-06-15
Method for fabricating a cell structure for mask ROM Grant 5,895,241 - Lu , et al. April 20, 1	1999-04-20
Virtual ground flash cell with asymmetrically placed source and drain and method of fabrication Grant 5,837,584 - Lu , et al. November 17, 1	1998-11-17

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