loadpatents
name:-0.024916887283325
name:-0.024605989456177
name:-0.010524034500122
Wang; Long-Ching Patent Filings

Wang; Long-Ching

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Long-Ching.The latest application filed is for "wafer level chip scale semiconductor package".

Company Profile
10.23.21
  • Wang; Long-Ching - Cupertino CA
  • Wang; Long Ching - Taichung N/A TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Dmos Fet Chip Scale Package And Method Of Making The Same
App 20220278009 - Xue; Yan Xun ;   et al.
2022-09-01
Wafer Level Chip Scale Semiconductor Package
App 20220278076 - Xue; Yan Xun ;   et al.
2022-09-01
Method for semi-wafer level packaging
Grant 11,430,762 - Xue , et al. August 30, 2
2022-08-30
Method For Semi-wafer Level Packaging
App 20220208724 - Xue; Yan Xun ;   et al.
2022-06-30
Semiconductor Package Having Wettable Lead Flank And Method Of Making The Same
App 20220199425 - Xue; Yan Xun ;   et al.
2022-06-23
Power semiconductor package having integrated inductor, resistor and capacitor
Grant 11,309,233 - Zhang , et al. April 19, 2
2022-04-19
Super-fast transient response (STR) AC/DC converter for high power density charging application
Grant 11,258,270 - Huang , et al. February 22, 2
2022-02-22
Semiconductor package having enlarged gate pad and method of making the same
Grant 11,222,858 - Xue , et al. January 11, 2
2022-01-11
Semiconductor Package Having Enlarged Gate Pad And Method Of Making The Same
App 20210398926 - Xue; Yan Xun ;   et al.
2021-12-23
Method of making reverse conducting insulated gate bipolar transistor
Grant 11,101,137 - Niu , et al. August 24, 2
2021-08-24
Semiconductor package and method of making the same
Grant 11,069,604 - Zhang , et al. July 20, 2
2021-07-20
Power Module Having Interconnected Base Plate With Molded Metal And Method Of Making The Same
App 20210175155 - Niu; Zhiqiang ;   et al.
2021-06-10
Semiconductor Package Having Thin Substrate And Method Of Making The Same
App 20210125940 - Lu; Jun ;   et al.
2021-04-29
Common source land grid array package
Grant 10,991,680 - Xue , et al. April 27, 2
2021-04-27
Semiconductor package having high mechanical strength
Grant 10,991,660 - Wang , et al. April 27, 2
2021-04-27
Common Source Land Grid Array Package
App 20210083088 - Xue; Yan Xun ;   et al.
2021-03-18
Power Semiconductor Package Having Integrated Inductor And Method Of Making The Same
App 20210082790 - Zhang; Xiaotian ;   et al.
2021-03-18
Power Semiconductor Package Having Integrated Inductor, Resistor And Capacitor
App 20210082793 - Zhang; Xiaotian ;   et al.
2021-03-18
Super-fast Transient Response (str) Ac/dc Converter For High Power Density Charging Application
App 20200412148 - Huang; Pei-Lun ;   et al.
2020-12-31
Super-fast transient response (STR) AC/DC converter for high power density charging application
Grant 10,818,568 - Huang , et al. October 27, 2
2020-10-27
Semiconductor Package And Method Of Making The Same
App 20200194347 - Xue; Yan Xun ;   et al.
2020-06-18
Semiconductor Package And Method Of Making The Same
App 20200194395 - Zhang; Xiaotian ;   et al.
2020-06-18
Super-fast transient response (STR) AC/DC Converter for high power density charging application
Grant 10,630,080 - Huang , et al.
2020-04-21
Packaging arrangements including high density interconnect bridge
Grant 10,438,881 - Wang , et al. O
2019-10-08
Methods and apparatus for self-alignment of integrated circuit dies
Grant 10,431,515 - Wang , et al. O
2019-10-01
Semiconductor Package Having High Mechanical Strength
App 20190189569 - Wang; Long-Ching ;   et al.
2019-06-20
Method and apparatus for interconnecting stacked dies using metal posts
Grant 9,972,602 - Wang May 15, 2
2018-05-15
Methods and Apparatus for Self-Alignment of Integrated Circuit Dies
App 20180068921 - Wang; Long-Ching ;   et al.
2018-03-08
Method and apparatus for improving the reliability of a connection to a via in a substrate
Grant 9,659,851 - Wang , et al. May 23, 2
2017-05-23
Packaging Arrangements Including High Density Interconnect Bridge
App 20170125334 - Wang; Long-Ching ;   et al.
2017-05-04
Method and apparatus for incorporating passive devices in an integrated passive device separate from a die
Grant 9,444,510 - Leong , et al. September 13, 2
2016-09-13
Method And Apparatus For Interconnecting Stacked Dies Using Metal Posts
App 20160247784 - Wang; Long-Ching
2016-08-25
Method And Apparatus For Incorporating Passive Devices In An Integrated Passive Device Separate From A Die
App 20150244410 - Leong; Poh Boon ;   et al.
2015-08-27
Method And Apparatus For Improving The Reliability Of A Connection To A Via In A Substrate
App 20150228569 - Wang; Long-Ching ;   et al.
2015-08-13
Direction interactive member of a wrench
Grant D727,120 - Wang April 21, 2
2015-04-21
Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same
Grant 8,846,538 - Chen , et al. September 30, 2
2014-09-30
Panel based lead frame packaging method and device
Grant 8,435,837 - Tsai , et al. May 7, 2
2013-05-07
Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same
Grant 8,258,065 - Chen , et al. September 4, 2
2012-09-04
Panel Based Lead Frame Packaging Method And Device
App 20110140254 - Tsai; Chen Lung ;   et al.
2011-06-16
Passive Elements, Articles, Packages, Semiconductor Composites, And Methods Of Manufacturing Same
App 20100173468 - CHEN; Bomy ;   et al.
2010-07-08
Passive elements, articles, packages, semiconductor composites, and methods of manufacturing same
Grant 7,605,092 - Chen , et al. October 20, 2
2009-10-20

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed