Wang; Laung-Terng (L.-T.)

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Laung-Terng (L.-T.).The latest application filed is for "method and apparatus for broadcasting scan patterns in a scan-based integrated circuit".

Company Profile

0.20.13

Wang; Laung-Terng (L.-T.) - Sunnyvale CA US
WANG; Laung-Terng (L.-T.) - L.-T.

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Computer-aided design system to automate scan synthesis at register-transfer level Grant 8,543,950 - Wang , et al. September 24, 2	2013-09-24
Method And Apparatus For Broadcasting Scan Patterns In A Scan-based Integrated Circuit App 20120331361 - WANG; Laung-Terng (L.-T.)	2012-12-27
Computer-aided Design System To Automate Scan Synthesis At Register-transfer Level App 20120246604 - WANG; Laung-Terng (L. -T.) ; et al.	2012-09-27
Computer-aided Design System To Automate Scan Synthesis At Register-transfer Level App 20110197171 - WANG; Laung-Terng (L.-T.) ; et al.	2011-08-11
Method and apparatus for unifying self-test with scan-test during prototype debug and production test Grant 7,945,830 - Wang , et al. May 17, 2	2011-05-17
Method and apparatus for pipelined scan compression Grant 7,945,833 - Wang , et al. May 17, 2	2011-05-17
X-canceling multiple-input signature register (MISR) for compacting output responses with unknowns Grant 7,925,947 - Touba , et al. April 12, 2	2011-04-12
Multiple-capture DFT system for scan-based integrated circuits Grant 7,904,773 - Wang , et al. March 8, 2	2011-03-08
Method and Apparatus for Unifying Self-Test with Scan-Test During Prototype Debug and Production Test App 20100218062 - WANG; Laung-Terng (L.-T.) ; et al.	2010-08-26
Compacting test responses using X-driven compactor Grant 7,779,322 - Wang , et al. August 17, 2	2010-08-17
Mask network design for scan-based integrated circuits Grant 7,735,049 - Wang , et al. June 8, 2	2010-06-08
Method and apparatus for broadcasting test patterns in a scan-based integrated circuit Grant 7,721,172 - Wang , et al. May 18, 2	2010-05-18
Method and apparatus for pipelined scan compression Grant 7,590,905 - Abdel-Hafez , et al. September 15, 2	2009-09-15
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test App 20090132880 - Wang; Laung-Terng (L.- T.) ; et al.	2009-05-21
Multiple-Capture DFT system for scan-based integrated circuits App 20090070646 - Wang; Laung-Terng (L.T.) ; et al.	2009-03-12
Method and apparatus for broadcasting scan patterns in a random access based integrated circuit App 20080276143 - Wang; Laung-Terng (L.-T.) ; et al.	2008-11-06
Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit App 20080276141 - Wang; Laung-Terng(L.-T.) ; et al.	2008-11-06
Method and apparatus for unifying self-test with scan-test during prototype debug and production test Grant 7,444,567 - Wang , et al. October 28, 2	2008-10-28
Method and apparatus for broadcasting test patterns in a scan based integrated circuit Grant 7,412,637 - Wang , et al. August 12, 2	2008-08-12
Computer-aided design system to automate scan synthesis at register-transfer level Grant 7,331,032 - Wang , et al. February 12, 2	2008-02-12
Method and apparatus for multi-level scan compression Grant 7,231,570 - Wang , et al. June 12, 2	2007-06-12
IEEE Std. 1149.4 compatible analog BIST methodology Grant 7,228,479 - Su , et al. June 5, 2	2007-06-05
Method for performing ATPG and fault simulation in a scan-based integrated circuit Grant 7,210,082 - Abdel-Hafez , et al. April 24, 2	2007-04-24
Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (DFD) techniques Grant 7,191,373 - Wang , et al. March 13, 2	2007-03-13
Method and apparatus for broadcasting scan patterns in a random access scan based integrated circuit App 20060242502 - Wang; Laung-Terng (L.-T.) ; et al.	2006-10-26
Mask network design for scan-based integrated circuits Grant 7,032,148 - Wang , et al. April 18, 2	2006-04-18
Method and apparatus for pipelined scan compression App 20060064614 - Abdel-Hafez; Khader S. ; et al.	2006-03-23
Multiple-capture DFT system for detecting or locating crossing clock-domain faults during self-test or scan-test Grant 7,007,213 - Wang , et al. February 28, 2	2006-02-28
Method and apparatus for multi-level scan compression App 20050268194 - Wang, Laung-Terng (L.T.) ; et al.	2005-12-01
Multiple-capture DFT system for scan-based integrated circuits Grant 6,954,887 - Wang , et al. October 11, 2	2005-10-11
Method and apparatus for functional language temporal extensions, dynamic modeling, and verification in a system-level simulation environment App 20050209840 - Baklashov, Mikhail ; et al.	2005-09-22
Computer-aided design system to automate scan synthesis at register-transfer level App 20030023941 - Wang, Laung-Terng (L.-T.) ; et al.	2003-01-30

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