loadpatents
name:-0.030278921127319
name:-0.44751811027527
name:-0.021351099014282
Wang; Kesheng Patent Filings

Wang; Kesheng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Kesheng.The latest application filed is for "method and device for adjusting multimedia blackboard, medium, and electronic apparatus".

Company Profile
2.11.9
  • Wang; Kesheng - Beijing CN
  • Wang; Kesheng - Milpitas CA
  • Wang; Kesheng - San Jose CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Vertical display device
Grant D958,246 - Huang , et al. July 19, 2
2022-07-19
Method and device for adjusting multimedia blackboard, medium, and electronic apparatus
Grant 11,184,577 - Huang , et al. November 23, 2
2021-11-23
Method And Device For Adjusting Multimedia Blackboard, Medium, And Electronic Apparatus
App 20210289161 - Huang; Jin ;   et al.
2021-09-16
Method And Device For Adjusting Display Of Multimedia Blackboard, Medium And Electronic Device
App 20210286461 - Huang; Jin ;   et al.
2021-09-16
Method and device for adaptively controlling multimedia blackboard, medium, and electronic apparatus
Grant 11,017,565 - Huang , et al. May 25, 2
2021-05-25
Scan chain circuits in non-volatile memory
Grant 9,767,905 - Wang September 19, 2
2017-09-19
Scan Chain Circuits In Non-Volatile Memory
App 20170115342 - Wang; Kesheng
2017-04-27
NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with serial interface
Grant 8,996,785 - Lee , et al. March 31, 2
2015-03-31
Charge pump with a power-controlled clock buffer to reduce power consumption and output voltage ripple
Grant 8,860,501 - Wang , et al. October 14, 2
2014-10-14
Charge pump with a power-controlled clock buffer to reduce power consumption and output voltage ripple
Grant 8,836,412 - Wang , et al. September 16, 2
2014-09-16
Charge Pump with a Power-Controlled Clock Buffer to Reduce Power Consumption and Output Voltage Ripple
App 20140247676 - Wang; Kesheng ;   et al.
2014-09-04
Charge Pump With A Power-controlled Clock Buffer To Reduce Power Consumption And Output Voltage Ripple
App 20140225652 - Wang; Kesheng ;   et al.
2014-08-14
NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with parallel interface
Grant 8,775,719 - Lee , et al. July 8, 2
2014-07-08
Memory system having NAND-based NOR and NAND flashes and SRAM integrated in one chip for hybrid data, code and cache storage
Grant 8,149,622 - Lee , et al. April 3, 2
2012-04-03
Novel NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with serial interface
App 20110072201 - Lee; Peter W. ;   et al.
2011-03-24
Novel NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with parallel interface
App 20110072200 - Lee; Peter W. ;   et al.
2011-03-24
Novel NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with serial interface
App 20110051519 - Lee; Peter W. ;   et al.
2011-03-03
Memory System Having Nand-based Nor And Nand Flashes And Sram Integrated In One Chip For Hybrid Data, Code And Cache Storage
App 20100329011 - Lee; Peter Wung ;   et al.
2010-12-30

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