Wang; Chih-Hsin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Chih-Hsin.The latest application filed is for "robot and method for recognizing human faces and gestures thereof".

Company Profile

0.56.52

Wang; Chih-Hsin - Kaohsiung TW
Wang; Chih-Hsin - San Jose CA
Wang; Chih-Hsin - Taipei TW
Wang; Chih-Hsin - Taipei Hsien TW
Wang; Chih-Hsin - Lungching Shiang TW
Wang; Chih-Hsin - Taichung Hsien TW
Wang; Chih-Hsin - Lung Ching Hsiang Taichung Hsien TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Formyl peptide receptor 1 antagonists and uses thereof Grant 9,895,329 - Hwang , et al. February 20, 2	2018-02-20
Multi-level memory cell read, program, and erase techniques Grant 8,792,274 - Tang , et al. July 29, 2	2014-07-29
Positive and negative voltage level shifter circuit Grant 8,270,234 - Tang , et al. September 18, 2	2012-09-18
High-voltage LDMOSFET and applications therefor in standard CMOS Grant 8,264,039 - Wang , et al. September 11, 2	2012-09-11
System and methods for multi-level nonvolatile memory read, program and erase Grant 8,248,848 - Tang , et al. August 21, 2	2012-08-21
Non-volatile memory cell and array Grant 8,120,088 - She , et al. February 21, 2	2012-02-21
Array architecture including mirrored segments for nonvolatile memory device Grant 8,116,110 - Sutardja , et al. February 14, 2	2012-02-14
Semiconductor structure with communication element Grant 8,113,436 - Wang February 14, 2	2012-02-14
Isolation for non-volatile memory cell array Grant 8,072,023 - Wang December 6, 2	2011-12-06
Robot And Method For Recognizing Human Faces And Gestures Thereof App 20110158476 - Fahn; Chin-Shyurng ; et al.	2011-06-30
Positive and negative voltage level shifter circuit Grant 7,948,810 - Tang , et al. May 24, 2	2011-05-24
Non-volatile memory cell array and logic Grant 7,847,374 - Wang December 7, 2	2010-12-07
Method and apparatus for semiconductor device and semiconductor memory device Grant 7,824,981 - Wang November 2, 2	2010-11-02
System for tracking elements using tags Grant 7,784,688 - Wang August 31, 2	2010-08-31
Electrically alterable memory cell Grant 7,759,719 - Wang July 20, 2	2010-07-20
Methods of forming semiconductor devices Grant 7,745,286 - Wang June 29, 2	2010-06-29
Program-and-erase method for multilevel nonvolatile memory Grant 7,746,704 - Tang , et al. June 29, 2	2010-06-29
Method and apparatus transporting charges in semiconductor device and semiconductor memory device Grant 7,741,177 - Wang June 22, 2	2010-06-22
Auto-zero current sensing amplifier Grant 7,724,596 - Sutardja , et al. May 25, 2	2010-05-25
Low power electrically alterable nonvolatile memory cells and arrays Grant 7,719,050 - Wang May 18, 2	2010-05-18
Method and Related Apparatus for Controlling Operating Mode of a Portable Electronic Device App 20100100202 - Chen; Chi-Chin ; et al.	2010-04-22
Secure system for tracking elements using tags Grant 7,665,661 - Wang February 23, 2	2010-02-23
Semiconductor structure with communication element App 20100038763 - Wang; Chih-Hsin	2010-02-18
Electrically alterable non-volatile memory cells and arrays Grant 7,626,864 - Wang December 1, 2	2009-12-01
Methods for operating semiconductor device and semiconductor memory device Grant 7,613,041 - Wang November 3, 2	2009-11-03
Semiconductor structure with RF element Grant 7,607,586 - Wang October 27, 2	2009-10-27
RF tags affixed in manufactured elements Grant 7,595,728 - Wang September 29, 2	2009-09-29
Method and apparatus transporting charges in semiconductor device and semiconductor memory device Grant 7,550,800 - Wang June 23, 2	2009-06-23
Low power electrically alterable nonvolatile memory cells and arrays Grant 7,547,601 - Wang June 16, 2	2009-06-16
Alignment Protection In Non-volatile Memory And Array App 20080237696 - Wang; Chih-Hsin	2008-10-02
Electrically Alterable Non-volatile Memory And Array App 20080203464 - Wang; Chih-Hsin	2008-08-28
Low power electrically alterable nonvolatile memory cells and arrays Grant 7,411,244 - Wang August 12, 2	2008-08-12
High voltage FET gate structure Grant 7,375,398 - Wang , et al. May 20, 2	2008-05-20
Methods of operating electrically alterable non-volatile memory cell Grant 7,372,734 - Wang May 13, 2	2008-05-13
Method and apparatus for semiconductor device and semiconductor memory device App 20080070390 - Wang; Chih-Hsin	2008-03-20
Low power electrically alterable nonvolatile memory cells and arrays App 20080061321 - Wang; Chih-Hsin	2008-03-13
Method and apparatus transporting charges in semiconductor device and semiconductor memory device App 20070281425 - Wang; Chih-Hsin	2007-12-06
Method and apparatus transporting charges in semiconductor device and semiconductor memory device App 20070281426 - Wang; Chih-Hsin	2007-12-06
Method and apparatus for semiconductor device and semiconductor memory device Grant 7,297,634 - Wang November 20, 2	2007-11-20
Inverter Non-volatile Memory Cell And Array System App 20070263456 - Wang; Bin ; et al.	2007-11-15
Electrically Alterable Non-volatile Memory Cells And Arrays App 20070253257 - Wang; Chih-Hsin	2007-11-01
Inverter non-volatile memory cell and array system Grant 7,257,033 - Wang , et al. August 14, 2	2007-08-14
P-channel electrically alterable non-volatile memory cell Grant 7,180,125 - Wang February 20, 2	2007-02-20
Rope Device App 20070011851 - Wang; Chih-Hsin	2007-01-18
Methods For Operating Semiconductor Device And Semiconductor Memory Device App 20070008778 - Wang; Chih-Hsin	2007-01-11
RF tags affixed in manufactured elements App 20060290504 - Wang; Chih-Hsin	2006-12-28
Low power electrically alterable nonvolatile memory cells and arrays App 20060289924 - Wang; Chih-Hsin	2006-12-28
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line Grant 7,144,778 - Kianian , et al. December 5, 2	2006-12-05
Methods of operating electrically alterable non-volatile memory cell App 20060240613 - Wang; Chih-Hsin	2006-10-26
Method and apparatus for nonvolatile memory Grant 7,115,942 - Wang October 3, 2	2006-10-03
Semiconductor structure with RF element App 20060214798 - Wang; Chih-Hsin	2006-09-28
Secure system for tracking elements using tags App 20060214794 - Wang; Chih-Hsin	2006-09-28
System for tracking elements using tags App 20060213988 - Wang; Chih-Hsin	2006-09-28
Inverter non-volatile memory cell and array system App 20060209598 - Wang; Bin ; et al.	2006-09-21
Safety device of collar for pet Grant 7,107,941 - Wang September 19, 2	2006-09-19
Electrically alterable non-volatile memory cell Grant 7,098,499 - Wang August 29, 2	2006-08-29
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor Grant 7,074,672 - Kianian , et al. July 11, 2	2006-07-11
Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gate spacers Grant 7,018,897 - Wang March 28, 2	2006-03-28
Method of forming floating-gate memory cell having trench structure with ballistic-charge injector, and the array of memory cells made thereby Grant 7,015,102 - Wang March 21, 2	2006-03-21
Electrically alterable non-volatile memory cell App 20060035424 - Wang; Chih-Hsin	2006-02-16
P-channel electrically alterable non-volatile memory cell App 20060033146 - Wang; Chih-Hsin	2006-02-16
Method and apparatus for nonvolatile memory App 20060017091 - Wang; Chih-Hsin	2006-01-26
Electrically alterable memory cell App 20060006454 - Wang; Chih-Hsin	2006-01-12
Method and apparatus transporting charges in semiconductor device and semiconductor memory device App 20060001053 - Wang; Chih-Hsin	2006-01-05
High voltage FET gate structure App 20060001050 - Wang; Bin ; et al.	2006-01-05
High-voltage LDMOSFET and applications therefor in standard CMOS App 20050258461 - Wang, Bin ; et al.	2005-11-24
Floating-gate memory cell having trench structure with ballistic-charge injector, and the array of memory cells Grant 6,958,513 - Wang October 25, 2	2005-10-25
Semiconductor memory array of floating gate memory cells with buried bit-line and raised source line Grant 6,952,033 - Kianian , et al. October 4, 2	2005-10-04
Method and apparatus for semiconductor device and semiconductor memory device App 20050201150 - Wang, Chih-Hsin	2005-09-15
Method of forming floating-gate memory cell having trench structure with ballistic-charge injector, and the array of memory cells made thereby App 20050169041 - Wang, Chih-Hsin	2005-08-04
Semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor Grant 6,917,069 - Kianian , et al. July 12, 2	2005-07-12
Safety device of collar for pet App 20050145203 - Wang, Chih-Hsin	2005-07-07
Web with smooth feel, bright appearance and durability App 20050130528 - Wang, Chih-Hsin	2005-06-16
Method of operating a semiconductor memory array of floating gate memory cells with horizontally oriented edges Grant 6,882,572 - Wang , et al. April 19, 2	2005-04-19
Semiconductor memory array of floating gate memory cells with control gate spacer portions Grant 6,868,015 - Wang March 15, 2	2005-03-15
Array of floating gate memory cells having strap regions and a peripheral logic device region Grant 6,861,698 - Wang March 1, 2	2005-03-01
Semiconductor memory array of floating gate memory cells with low resistance source regions and high source coupling Grant 6,855,980 - Wang , et al. February 15, 2	2005-02-15
Floating-gate Memory Cell Having Trench Structure With Ballastic-charge Injector And Array Of Memory Cells App 20040248371 - Wang, Chih-Hsin	2004-12-09
Method of operating a semiconductor memory array of floating gate memory cells with horizontally oriented edges App 20040212009 - Wang, Chih Hsin ; et al.	2004-10-28
Self aligned method of forming a semiconductor memory array of floating gate memory cells with horizontally oriented edges App 20040214396 - Wang, Chih Hsin ; et al.	2004-10-28
Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gate spacers App 20040214395 - Wang, Chih Hsin	2004-10-28
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line App 20040191990 - Kianian, Sohrab ; et al.	2004-09-30
Method Of Operating A Semiconductor Memory Array Of Floating Gate Memory Cells With Buried Bit-line And Vertical Word Line Transistor App 20040160824 - Kianian, Sohrab ; et al.	2004-08-19
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and vertical word line transistor App 20040159864 - Kianian, Sohrab ; et al.	2004-08-19
Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gate protruding portions Grant 6,773,989 - Wang August 10, 2	2004-08-10
Method of forming a semiconductor array of floating gate memory cells and strap regions Grant 6,773,974 - Wang , et al. August 10, 2	2004-08-10
Semiconductor memory array of floating gate memory cells with horizontally oriented floating gate edges Grant 6,756,633 - Wang , et al. June 29, 2	2004-06-29
Method of forming a semiconductor array of floating gate memory cells and strap regions, and a memory array and strap regions made thereby Grant 6,743,674 - Wang June 1, 2	2004-06-01
Semiconductor memory array of floating gate memory cells with low resistance source regions and high source coupling App 20040084717 - Wang, Chih Hsin ; et al.	2004-05-06
Semiconductor memory array of floating gate memory cells with low resistance source regions and high source coupling Grant 6,727,545 - Wang , et al. April 27, 2	2004-04-27
Spooling apparatus Grant 6,695,101 - Wang February 24, 2	2004-02-24
Nonvolatile electrically alterable memory device and array made thereby App 20040004863 - Wang, Chih-Hsin	2004-01-08
Method of forming a semiconductor array of floating gate memory cells and strap regions App 20030189223 - Wang, Chih Hsin ; et al.	2003-10-09
Self-aligned floating gate poly for a flash E2PROM cell Grant 6,627,942 - Wang September 30, 2	2003-09-30
Semiconductor memory array of floating gate memory cells with control gates protruding portions Grant 6,627,946 - Wang September 30, 2	2003-09-30
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bit-line and raised source line, and a memory array made thereby App 20030178668 - Kianian, Sohrab ; et al.	2003-09-25
Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gate protruding portions App 20030162347 - Wang, Chih Hsin	2003-08-28
Method of forming a semiconductor array of floating gate memory cells having strap regions and a peripheral logic device region, and the array of memory cells formed thereby App 20030139010 - Wang, Chih Hsin	2003-07-24
Self aligned method of forming a semiconductor memory array of floating gate memory cells with horizontally oriented edges, and a memory array thereby App 20030122185 - Wang, Chih Hsin ; et al.	2003-07-03
Seniconductor Array Of Floating Gate Memory Cells And Strap Regions App 20030080371 - Wang, Chih Hsin ; et al.	2003-05-01
Self aligned method of forming a semiconductor memory array of floating gate memory cells with buried bitline and vertical word line transistor, and a memory array made thereby App 20030073275 - Kianian, Sohrab ; et al.	2003-04-17
Method of forming a semiconductor array of floating gate memory cells having strap regions and a peripheral logic device region Grant 6,541,324 - Wang April 1, 2	2003-04-01
Method of forming a semiconductor array of floating gate memory cells and strap regions, and a memory array and strap regions made thereby App 20030053347 - Wang, Chih Hsin	2003-03-20
Method of forming a self-aligned floating gate poly to an active region for a flash E2PROM cell App 20020142544 - Wang, Chih Hsin	2002-10-03
Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gates protruding portions, and a memory array made thereby App 20020034847 - Wang, Chih Hsin	2002-03-21
Self aligned method of forming a semiconductor memory array of floating gate memory cells with low resistance source regions and high source coupling, and a memory array made thereby App 20020034849 - Wang, Chih Hsin ; et al.	2002-03-21
Self aligned method of forming a semiconductor memory array of floating gate memory cells with control gate spacers, and a memory array made thereby App 20020034846 - Wang, Chih Hsin	2002-03-21