| Patent | Date |
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MAC processing pipeline having conversion circuitry, and methods of operating same
Grant 11,455,368 - Ware , et al. September 27, 2 | 2022-09-27 |
MAC processing pipelines, circuitry to control and configure same, and methods of operating same
Grant 11,442,881 - Ware , et al. September 13, 2 | 2022-09-13 |
MAC Processing Pipelines, Circuitry to Configure Same, and Methods of Operating Same
App 20220283779 - Ware; Frederick A. ; et al. | 2022-09-08 |
Multiplier-Accumulator Processing Pipelines and Processing Component, and Methods of Operating Same
App 20220269506 - Ware; Frederick A. ; et al. | 2022-08-25 |
MAC Processing Pipeline having Activation Circuitry, and Methods of Operating Same
App 20220244917 - Ware; Frederick A ; et al. | 2022-08-04 |
Multiplier-Accumulator Processing Pipelines and Processing Component, and Methods of Operating Same
App 20220236986 - Ware; Frederick A. ; et al. | 2022-07-28 |
IC including Logic Tile, having Reconfigurable MAC Pipeline, and Reconfigurable Memory
App 20220214888 - Wang; Cheng C. | 2022-07-07 |
Process of Routing Tile-to-Tile Interconnects of an FPGA, and Method of Manufacturing an FPGA
App 20220173738 - Liu; Yongning ; et al. | 2022-06-02 |
Multiplier Circuit Array, MAC and MAC Pipeline including Same, and Methods of Configuring Same
App 20220171604 - Ware; Frederick A ; et al. | 2022-06-02 |
Test circuitry and techniques for logic tiles of FPGA
Grant 11,323,120 - Wang May 3, 2 | 2022-05-03 |
Multiplier-accumulator processing pipelines and processing component, and methods of operating same
Grant 11,314,504 - Ware , et al. April 26, 2 | 2022-04-26 |
IC including logic tile, having reconfigurable MAC pipeline, and reconfigurable memory
Grant 11,288,076 - Wang March 29, 2 | 2022-03-29 |
Multiplier-Accumulator Circuitry having Processing Pipelines and Methods of Operating Same
App 20220083342 - Ware; Frederick A. ; et al. | 2022-03-17 |
Process of routing tile-to-tile interconnects of an FPGA, and method of manufacturing an FPGA
Grant 11,277,135 - Liu , et al. March 15, 2 | 2022-03-15 |
Configurable MAC Pipelines for Finite-Impulse-Response Filtering, and Methods of Operating Same
App 20220057994 - Ware; Frederick A. ; et al. | 2022-02-24 |
MAC Processing Pipelines having Programmable Granularity, and Methods of Operating Same
App 20220027152 - Ware; Frederick A ; et al. | 2022-01-27 |
Multiplier-accumulator circuitry having processing pipelines and methods of operating same
Grant 11,194,585 - Ware , et al. December 7, 2 | 2021-12-07 |
MAC Processing Pipelines, Circuitry to Control and Configure Same, and Methods of Operating Same
App 20210326286 - Ware; Frederick A. ; et al. | 2021-10-21 |
Multiplier-Accumulator Circuitry, and Processing Pipeline including Same
App 20210273641 - Wang; Cheng C. | 2021-09-02 |
Logarithmic Addition-Accumulator Circuitry, Processing Pipeline including Same, and Methods of Operation
App 20210173617 - Ware; Frederick A. ; et al. | 2021-06-10 |
MAC Processing Pipeline using Filter Weights having Enhanced Dynamic Range, and Methods of Operating Same
App 20210132905 - Ware; Frederick A. ; et al. | 2021-05-06 |
Test Circuitry and Techniques for Logic Tiles of FPGA
App 20210126640 - Wang; Cheng C | 2021-04-29 |
MAC Processing Pipeline having Conversion Circuitry, and Methods of Operating Same
App 20210103630 - Ware; Frederick A. ; et al. | 2021-04-08 |
Multiplier-accumulator circuitry, and processing pipeline including same
Grant 10,972,103 - Wang April 6, 2 | 2021-04-06 |
IC including Logic Tile, having Reconfigurable MAC Pipeline, and Reconfigurable Memory
App 20210081211 - Wang; Cheng C. | 2021-03-18 |
Process of Routing Tile-to-Tile Interconnects of an FPGA, and Method of Manufacturing an FPGA
App 20210083674 - Liu; Yongning ; et al. | 2021-03-18 |
Test circuitry and techniques for logic tiles of FPGA
Grant 10,886,922 - Wang January 5, 2 | 2021-01-05 |
Multiplier-Accumulator Circuitry and Pipeline using Floating Point Data, and Methods of using Same
App 20200401414 - Ware; Frederick A. ; et al. | 2020-12-24 |
Process of routing tile-to-tile interconnects of an FPGA, and method of manufacturing an FPGA
Grant 10,855,284 - Liu , et al. December 1, 2 | 2020-12-01 |
Multiplier-Accumulator Processing Pipelines and Processing Component, and Methods of Operating Same
App 20200326939 - Ware; Frederick A. ; et al. | 2020-10-15 |
Multiplier-Accumulator Circuitry having Processing Pipelines and Methods of Operating Same
App 20200310818 - Ware; Frederick A. ; et al. | 2020-10-01 |
Multiplier-Accumulator Circuitry, and Processing Pipeline including Same
App 20200295762 - Wang; Cheng C. | 2020-09-17 |
Programmable/configurable logic circuitry, control circuitry and method of dynamic context switching
Grant 10,775,433 - Ossman , et al. Sept | 2020-09-15 |
Multiplier-accumulator circuit, logic tile architecture for multiply-accumulate, and IC including logic tile array
Grant 10,693,469 - Wang | 2020-06-23 |
Clock architecture, including clock mesh fabric for FPGA, and method of operating same
Grant 10,686,448 - Natu , et al. | 2020-06-16 |
One-hot-bit multiplexer control circuitry and technique
Grant 10,684,975 - Wang , et al. | 2020-06-16 |
Modular field programmable gate array, and method of configuring and operating same
Grant 10,686,447 - Wang , et al. | 2020-06-16 |
Block memory layout and architecture for programmable logic IC, and method of operating same
Grant 10,680,616 - Tate , et al. | 2020-06-09 |
Test Circuitry and Techniques for Logic Tiles of FPGA
App 20200127666 - Wang; Cheng C. | 2020-04-23 |
Clock distribution and generation architecture for logic tiles of an integrated circuit and method of operating same
Grant 10,587,271 - Wang , et al. | 2020-03-10 |
Integrated circuit including an array of logic tiles, each logic tile including a configurable switch interconnect network
Grant 10,587,269 - Wang | 2020-03-10 |
Multiplier-Accumulator Circuit, Logic Tile Architecture for Multiply-Accumulate, and IC including Logic Tile Array
App 20200076435 - Wang; Cheng C. | 2020-03-05 |
Test circuitry and techniques for logic tiles of FPGA
Grant 10,523,209 - Wang Dec | 2019-12-31 |
Clock Architecture, including Clock Mesh Fabric for FPGA, and Method of Operating Same
App 20190334527 - Natu; Nitish U. ; et al. | 2019-10-31 |
Clock Distribution and Generation Architecture for Logic Tiles of an Integrated Circuit and Method of Operating Same
App 20190334526 - Wang; Cheng C. ; et al. | 2019-10-31 |
FPGA having a virtual array of logic tiles, and method of configuring and operating same
Grant 10,411,711 - Kozaczuk , et al. Sept | 2019-09-10 |
FPGA having programmable powered-up/powered-down logic tiles, and method of configuring and operating same
Grant 10,411,712 - Wang , et al. Sept | 2019-09-10 |
Clock distribution and generation architecture for logic tiles of an integrated circuit and method of operating same
Grant 10,348,307 - Wang , et al. July 9, 2 | 2019-07-09 |
Clock architecture, including clock mesh fabric, for FPGA, and method of operating same
Grant 10,348,308 - Natu , et al. July 9, 2 | 2019-07-09 |
Integrated Circuit Including An Array of Logic Tiles, Each Logic Tile Including a Configurable Switch Interconnect Network
App 20190207609 - Wang; Cheng C. | 2019-07-04 |
Integrated circuit including an array of logic tiles, each logic tile including a configurable switch interconnect network
Grant 10,250,262 - Wang | 2019-04-02 |
FPGA having Programmable Powered-Up/Powered-Down Logic Tiles, and Method of Configuring and Operating Same
App 20190028104 - Wang; Cheng C. ; et al. | 2019-01-24 |
Programmable decoupling capacitance of configurable logic circuitry and method of operating same
Grant 10,176,865 - Wang J | 2019-01-08 |
Clock Architecture, including Clock Mesh Fabric, for FPGA, and Method of Operating Same
App 20190007047 - Natu; Nitish U. ; et al. | 2019-01-03 |
Clock Distribution and Generation Architecture for Logic Tiles of an Integrated Circuit and Method of Operating Same
App 20180358970 - Wang; Cheng C. ; et al. | 2018-12-13 |
FPGA having a Virtual Array of Logic Tiles, and Method of Configuring and Operating Same
App 20180343010 - Kozaczuk; Anthony ; et al. | 2018-11-29 |
Block Memory Layout and Architecture for Programmable Logic IC, and Method of Operating Same
App 20180262198 - Tate; Geoffrey R. ; et al. | 2018-09-13 |
Integrated Circuit Including An Array of Logic Tiles, Each Logic Tile Including A Configurable Switch Interconnect Network
App 20180198450 - Wang; Cheng C. | 2018-07-12 |
Block memory layout and architecture for programmable logic IC, and method of operating same
Grant 9,973,194 - Tate , et al. May 15, 2 | 2018-05-15 |
Multiplexer-memory cell circuit, layout thereof and method of manufacturing same
Grant 9,941,887 - Wang April 10, 2 | 2018-04-10 |
Integrated circuit including an array of logic tiles, each logic tile including a configurable switch interconnect network
Grant 9,906,225 - Wang February 27, 2 | 2018-02-27 |
Programmable Decoupling Capacitance of Configurable Logic Circuitry and Method of Operating Same
App 20180033480 - Wang; Cheng C. | 2018-02-01 |
Clock distribution architecture for logic tiles of an integrated circuit and method of operation thereof
Grant 9,882,568 - Wang January 30, 2 | 2018-01-30 |
Multiplexer-Memory Cell Circuit, Layout Thereof and Method of Manufacturing Same
App 20170366187 - Wang; Cheng C. | 2017-12-21 |
Mixed-radix and/or mixed-mode switch matrix architecture and integrated circuit, and method of operating same
Grant 9,793,898 - Wang October 17, 2 | 2017-10-17 |
Programmable decoupling capacitance of configurable logic circuitry and method of operating same
Grant 9,786,361 - Wang October 10, 2 | 2017-10-10 |
Multiplexer-memory cell circuit, layout thereof and method of manufacturing same
Grant 9,755,651 - Wang September 5, 2 | 2017-09-05 |
Integrated Circuit Including An Array of Logic Tiles, Each Logic Tile Including A Configurable Switch Interconnect Network
App 20170093404 - Wang; Cheng C. | 2017-03-30 |
Multiplexer-Memory Cell Circuit, Layout Thereof and Method of Manufacturing Same
App 20170093405 - Wang; Cheng C. | 2017-03-30 |
Block Memory Layout and Architecture for Programmable Logic IC, and Method of Operating Same
App 20170063378 - Tate; Geoffrey R. ; et al. | 2017-03-02 |
Mixed-Radix and/or Mixed-Mode Switch Matrix Architecture and Integrated Circuit, and Method of Operating Same
App 20170054445 - Wang; Cheng C. | 2017-02-23 |
Clock Distribution Architecture for Logic Tiles of an Integrated Circuit and Method of Operation Thereof
App 20170054443 - Wang; Cheng C. | 2017-02-23 |
Multiplexer-memory cell circuit, layout thereof and method of manufacturing same
Grant 9,543,958 - Wang January 10, 2 | 2017-01-10 |
Mixed-radix and/or mixed-mode switch matrix architecture and integrated circuit, and method of operating same
Grant 9,503,092 - Wang November 22, 2 | 2016-11-22 |
Clock distribution architecture for logic tiles of an integrated circuit and method of operation thereof
Grant 9,496,876 - Wang November 15, 2 | 2016-11-15 |
Mixed-Radix and/or Mixed-Mode Switch Matrix Architecture and Integrated Circuit, and Method of Operating Same
App 20160248428 - Wang; Cheng C. | 2016-08-25 |
Clock Distribution Architecture for Logic Tiles of an Integrated Circuit and Method of Operation Thereof
App 20160105185 - Wang; Cheng C. | 2016-04-14 |
Clock distribution architecture for logic tiles of an integrated circuit and method of operation thereof
Grant 9,240,791 - Wang January 19, 2 | 2016-01-19 |
Clock Distribution Architecture for Logic Tiles of an Integrated Circuit and Method of Operation Thereof
App 20150333756 - Wang; Cheng C. | 2015-11-19 |
Apparatus, Method, And System For Improving Power, Performance Efficiency By Coupling A First Core Type With A Second Core Type
App 20110320766 - Wu; Youfeng ; et al. | 2011-12-29 |
Apparatus and method for redundant software thread computation
Grant 7,818,744 - Wang , et al. October 19, 2 | 2010-10-19 |
Apparatus and method for dynamic binary translator to support precise exceptions with minimal optimization constraints
Grant 7,757,221 - Zheng , et al. July 13, 2 | 2010-07-13 |
Apparatus and method for software-based control flow checking for soft error detection to improve microprocessor reliability
Grant 7,506,217 - Borin , et al. March 17, 2 | 2009-03-17 |
Apparatus and method for redundant software thread computation
App 20070174837 - Wang; Cheng C. ; et al. | 2007-07-26 |
Apparatus and method for dynamic binary translator to support precise exceptions with minimal optimization constraints
App 20070079304 - Zheng; Bixia ; et al. | 2007-04-05 |
Inflatable article with edge concealing means
Grant 4,745,649 - Wang May 24, 1 | 1988-05-24 |
Inflatable pool
Grant 4,651,360 - Wang March 24, 1 | 1987-03-24 |
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