loadpatents
name:-0.0049028396606445
name:-0.031575918197632
name:-0.0003972053527832
Wang; Bonnie Patent Filings

Wang; Bonnie

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Bonnie.The latest application filed is for "integrated circuits with on-die decoupling capacitors".

Company Profile
0.32.5
  • Wang; Bonnie - Cupertino CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated Circuits With On-Die Decoupling Capacitors
App 20140374877 - Oh; Kyung Suk ;   et al.
2014-12-25
Input buffer for multiple differential I/O standards
Grant 7,710,149 - Chung , et al. May 4, 2
2010-05-04
Input buffer for multiple differential I/O standards
Grant 7,425,844 - Chung , et al. September 16, 2
2008-09-16
Programmable low-voltage differential signaling output driver
Grant 7,236,018 - Wang , et al. June 26, 2
2007-06-26
Method and apparatus for protecting a circuit during a hot socket condition
App 20070115028 - Wang; Xiaobao ;   et al.
2007-05-24
Techniques for controlling on-chip termination resistance using voltage range detection
Grant 7,218,155 - Chang , et al. May 15, 2
2007-05-15
Input buffer for multiple differential I/O standards
Grant 7,215,143 - Chung , et al. May 8, 2
2007-05-08
Supply voltage detection circuit
Grant 7,119,579 - Chong , et al. October 10, 2
2006-10-10
Programmable I/O element circuit for high speed logic devices
Grant 7,098,690 - Nguyen , et al. August 29, 2
2006-08-29
Differential input buffers with elevated power supplies
Grant 7,046,037 - Tyhach , et al. May 16, 2
2006-05-16
Dual-port SRAM in a programmable logic device
Grant 6,992,947 - Pan , et al. January 31, 2
2006-01-31
Method and apparatus for protecting a circuit during a hot socket condition
Grant 6,972,593 - Wang , et al. December 6, 2
2005-12-06
Supply voltage detection circuit
App 20050253626 - Chong, Yan ;   et al.
2005-11-17
Differential input buffers with elevated power supplies
Grant 6,956,401 - Tyhach , et al. October 18, 2
2005-10-18
Programmable I/O element circuit for high speed logic devices
App 20050162187 - Nguyen, Khai ;   et al.
2005-07-28
On/off reference voltage switch for multiple I/O standards
Grant 6,911,860 - Wang , et al. June 28, 2
2005-06-28
Data realignment techniques for serial-to-parallel conversion
Grant 6,911,923 - Wang , et al. June 28, 2
2005-06-28
Schmitt trigger circuit with adjustable trip point voltages
Grant 6,870,413 - Chang , et al. March 22, 2
2005-03-22
Supply voltage detection circuit
Grant 6,870,400 - Chong , et al. March 22, 2
2005-03-22
Programmable I/O element circuit for high speed logic devices
Grant 6,853,215 - Nguyen , et al. February 8, 2
2005-02-08
Input buffer for multiple differential I/O standards
Grant 6,825,692 - Chung , et al. November 30, 2
2004-11-30
Parallel programming of programmable logic using register chains
Grant 6,766,505 - Rangan , et al. July 20, 2
2004-07-20
Configurable decoder for addressing a memory
Grant 6,747,903 - Pan , et al. June 8, 2
2004-06-08
Programmable, staged, bus hold and weak pull-up for bi-directional I/O
Grant 6,731,137 - Rangan , et al. May 4, 2
2004-05-04
Circuit for providing clock signals with low skew
Grant 6,731,142 - Wang , et al. May 4, 2
2004-05-04
Hi-speed parallel configuration of programmable logic
Grant 6,714,044 - Rangan , et al. March 30, 2
2004-03-30
Data realignment techniques for serial-to-parallel conversion
Grant 6,707,399 - Wang , et al. March 16, 2
2004-03-16
Technique to test an integrated circuit using fewer pins
Grant 6,691,267 - Nguyen , et al. February 10, 2
2004-02-10
Programmable I/O element circuit for high speed logic devices
Grant 6,686,769 - Nguyen , et al. February 3, 2
2004-02-03
Programming mode selection with JTAG circuits
Grant 6,681,378 - Wang , et al. January 20, 2
2004-01-20
Dual-port SRAM in a programmable logic device
Grant 6,661,733 - Pan , et al. December 9, 2
2003-12-09
Supply voltage detection circuit
Grant 6,630,844 - Chong , et al. October 7, 2
2003-10-07
Circuit for providing clock signals with low skew
Grant 6,549,045 - Wang , et al. April 15, 2
2003-04-15
Technique to test an integrated circuit using fewer pins
Grant 6,538,469 - Nguyen , et al. March 25, 2
2003-03-25
Programming mode selection with JTAG circuits
App 20020157078 - Wang, Xiaobao ;   et al.
2002-10-24
Programming mode selection with JTAG circuits
Grant 6,421,812 - Wang , et al. July 16, 2
2002-07-16
Cascaded programming with multiple-purpose pins
Grant 6,314,550 - Wang , et al. November 6, 2
2001-11-06

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