Walls; Lloyd A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Walls; Lloyd A..The latest application filed is for "high speed chip substrate test fixture".

Company Profile

2.29.22

Walls; Lloyd A. - Austin TX
Walls; Lloyd A. - Fairfax VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for virtual braille keyboard Grant 10,795,573 - MacIsaac , et al. October 6, 2	2020-10-06
High speed chip substrate test fixture Grant 10,705,134 - Walls , et al.	2020-07-07
Noise modulation for on-chip noise measurement Grant 10,620,253 - Hejase , et al.	2020-04-14
High Speed Chip Substrate Test Fixture App 20190170809 - Walls; Lloyd A. ; et al.	2019-06-06
Noise Modulation For On-chip Noise Measurement App 20180045766 - Hejase; Jose A. ; et al.	2018-02-15
Method for performing frequency band splitting Grant 9,893,400 - Hejase , et al. February 13, 2	2018-02-13
Method And Apparatus For Virtual Braille Keyboard App 20180039404 - MacIsaac; Bruce J. ; et al.	2018-02-08
Noise modulation for on-chip noise measurement Grant 9,835,665 - Hejase , et al. December 5, 2	2017-12-05
Noise modulation for on-chip noise measurement Grant 9,797,938 - Hejase , et al. October 24, 2	2017-10-24
Reduced wiring requirements with signal slope manipulation Grant 9,548,769 - Bills , et al. January 17, 2	2017-01-17
Impedance matching system for DDR memory Grant 9,536,604 - Dreps , et al. January 3, 2	2017-01-03
Method for performing frequency band splitting Grant 9,368,852 - Hejase , et al. June 14, 2	2016-06-14
Method For Performing Frequency Band Splitting App 20160118706 - HEJASE; JOSE A. ; et al.	2016-04-28
Method For Performing Frequency Band Splitting App 20160118703 - HEJASE; JOSE A. ; et al.	2016-04-28
Multi-level connector and use thereof that mitigates data signaling reflections Grant 9,209,583 - Hasse , et al. December 8, 2	2015-12-08
Noise Modulation For On-chip Noise Measurement App 20150276838 - Hejase; Jose A. ; et al.	2015-10-01
Noise Modulation For On-chip Noise Measurement App 20150276840 - Hejase; Jose A. ; et al.	2015-10-01
Multi-level connector and use thereof that mitigates data signaling reflections Grant 9,118,144 - Hasse , et al. August 25, 2	2015-08-25
Reduced Wiring Requirements With Signal Slope Manipulation App 20140226749 - Bills; Kevin J. ; et al.	2014-08-14
Plating Stub Resonance Shift with Filter Stub Design Methodology App 20140167886 - Na; Nanju ; et al.	2014-06-19
Reduced wiring requirements with signal slope manipulation Grant 8,743,558 - Bills , et al. June 3, 2	2014-06-03
Fabrication method for circuit substrate having post-fed die side power supply connections Grant 8,722,536 - Douriet , et al. May 13, 2	2014-05-13
Continuously referencing signals over multiple layers in laminate packages Grant 8,716,851 - Preda , et al. May 6, 2	2014-05-06
Multi-Level Connector and Use Thereof that Mitigates Data Signaling Reflections App 20140075748 - Hasse; Michael D. ; et al.	2014-03-20
Plating Stub Resonance Shift with Filter Stub Design Methodology App 20130328645 - Na; Nanju ; et al.	2013-12-12
Multi-Level Connector and Use Thereof that Mitigates Data Signaling Reflections App 20130330940 - Hasse; Michael D. ; et al.	2013-12-12
Fabrication Method For Circuit Substrate Having Post-fed Die Side Power Supply Connections App 20130316534 - Douriet; Daniel ; et al.	2013-11-28
Fabrication method for circuit substrate having post-fed die side power supply connections Grant 8,586,476 - Douriet , et al. November 19, 2	2013-11-19
Multi-layered thermal sensor for integrated circuits and other layered structures Grant 8,425,115 - Rahman , et al. April 23, 2	2013-04-23
Reduced wiring requirements with signal slope manipulation Grant 8,358,509 - Bills , et al. January 22, 2	2013-01-22
Reduced Wiring Requirements With Signal Slope Manipulation App 20130010445 - Bills; Kevin J. ; et al.	2013-01-10
Continuously Referencing Signals Over Multiple Layers in Laminate Packages App 20120174047 - Preda; Francesco ; et al.	2012-07-05
Continuously referencing signals over multiple layers in laminate packages Grant 8,158,461 - Preda , et al. April 17, 2	2012-04-17
Circuit substrate having post-fed die side power supply connections Grant 7,863,724 - Douriet , et al. January 4, 2	2011-01-04
Fabrication Method For Circuit Substrate Having Post-fed Die Side Power Supply Connections App 20100330797 - Douriet; Daniel ; et al.	2010-12-30
Reduced Wiring Requirements With Signal Slope Manipulation App 20100195756 - Bills; Kevin J. ; et al.	2010-08-05
Continuously Referencing Signals Over Multiple Layers in Laminate Packages App 20090256253 - Preda; Francesco ; et al.	2009-10-15
Circuit Substrate Having Post-Fed Die Side Power Supply Connections App 20090200074 - Douriet; Daniel ; et al.	2009-08-13
Continuously Referencing Signals over Multiple Layers in Laminate Packages App 20080093726 - Preda; Francesco ; et al.	2008-04-24
Internal resistor termination in multi-chip module environments Grant 5,635,761 - Cao , et al. June 3, 1	1997-06-03
Method and apparatus for active termination of a line driver/receiver Grant 5,530,377 - Walls June 25, 1	1996-06-25
Electronic switch for decoupling capacitor Grant 5,506,457 - Krauter , et al. April 9, 1	1996-04-09
Charge-stabilized memory Grant 4,459,609 - Fifield , et al. July 10, 1	1984-07-10

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