Wallner; Jin Z.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wallner; Jin Z..The latest application filed is for "multi-layered integrated circuit with selective temperature coefficient of resistance".

Company Profile

0.7.5

Wallner; Jin Z. - Albany NY
Wallner; Jin Z. - Pleasant Valley NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Diffusion break forming after source/drain forming and related IC structure Grant 9,917,103 - Mulfinger , et al. March 13, 2	2018-03-13
Etch stop liner for contact punch through mitigation in SOI substrate Grant 9,899,257 - Wallner , et al. February 20, 2	2018-02-20
Multi-layered integrated circuit with selective temperature coefficient of resistance Grant 9,418,982 - Deng , et al. August 16, 2	2016-08-16
Method for embedded diamond-shaped stress element Grant 9,412,843 - Harley , et al. August 9, 2	2016-08-09
Multi-layered Integrated Circuit With Selective Temperature Coefficient Of Resistance App 20160181239 - Deng; Yanqing ; et al.	2016-06-23
Method For Embedded Diamond-shaped Stress Element App 20150340465 - Harley; Eric C. ; et al.	2015-11-26
FinFET formation with late fin reveal Grant 9,171,935 - Kim , et al. October 27, 2	2015-10-27
FinFET FORMATION WITH LATE FIN REVEAL App 20150255569 - Kim; Seong-Dong ; et al.	2015-09-10
Overlapping contacts for semiconductor device Grant 8,940,634 - Engel , et al. January 27, 2	2015-01-27
Overlapping Contacts For Semiconductor Device App 20130241070 - Engel; Brett H. ; et al.	2013-09-19
Overlapping Contacts For Semiconductor Device App 20130001786 - Engel; Brett H. ; et al.	2013-01-03

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