Walker; Andrew J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Walker; Andrew J..The latest application filed is for "high density spin orbit torque magnetic random access memory".

Company Profile

26.72.86

Walker; Andrew J. - Mountain View CA
Walker; Andrew J. - Moutain View CA
Walker; Andrew J. - Palo Alto CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Selector transistor with metal replacement gate wordline Grant 11,444,123 - Beery , et al. September 13, 2	2022-09-13
High Density Spin Orbit Torque Magnetic Random Access Memory App 20220223787 - Pinarbasi; Mustafa ; et al.	2022-07-14
Dram With Selective Epitaxial Cell Transistor App 20220189961 - Walker; Andrew J. ; et al.	2022-06-16
Compact And Efficient Cmos Inverter App 20220189829 - Levi; Amitay ; et al.	2022-06-16
DRAM with selective epitaxial transistor and buried bitline Grant 11,329,048 - Walker , et al. May 10, 2	2022-05-10
Compact and efficient CMOS inverter Grant 11,302,586 - Levi , et al. April 12, 2	2022-04-12
DRAM with selective epitaxial cell transistor Grant 11,302,697 - Walker , et al. April 12, 2	2022-04-12
Perpendicular magnetic tunnel junction memory cells having vertical channels Grant 11,222,970 - Kim , et al. January 11, 2	2022-01-11
Selector Transistor With Metal Replacement Gate Wordline App 20210391386 - Beery; Dafna ; et al.	2021-12-16
Compact And Efficient Cmos Inverter App 20210305105 - Levi; Amitay ; et al.	2021-09-30
Dram With Selective Epitaxial Transistor And Buried Bitline App 20210305256 - Walker; Andrew J. ; et al.	2021-09-30
Dram With Selective Epitaxial Cell Transistor App 20210233913 - Walker; Andrew J. ; et al.	2021-07-29
Selector Transistor With Continuously Variable Current Drive App 20210217814 - Walker; Andrew J. ; et al.	2021-07-15
Integration Of Epitaxially Grown Channel Selector With Two Terminal Resistive Switching Memory Element App 20210090626 - Beery; Dafna ; et al.	2021-03-25
Integration of epitaxially grown channel selector with two terminal resistive switching memory element Grant 10,957,370 - Beery , et al. March 23, 2	2021-03-23
Integration Of Epitaxially Grown Channel Selector With Mram Device App 20210065760 - Beery; Dafna ; et al.	2021-03-04
Integration of epitaxially grown channel selector with MRAM device Grant 10,937,479 - Beery , et al. March 2, 2	2021-03-02
High density MRAM integration Grant 10,930,703 - Kim , et al. February 23, 2	2021-02-23
Vertically-strained silicon device for use with a perpendicular magnetic tunnel junction (PMTJ) Grant 10,916,582 - Kim , et al. February 9, 2	2021-02-09
Vertical selector stt-MRAM architecture Grant 10,854,255 - Ong , et al. December 1, 2	2020-12-01
Vertical selector STT-MRAM architecture Grant 10,840,298 - Ong , et al. November 17, 2	2020-11-17
High density MRAM integration Grant 10,686,009 - Kim , et al.	2020-06-16
Methods of forming perpendicular magnetic tunnel junction memory cells having vertical channels Grant 10,658,425 - Kim , et al.	2020-05-19
Memory Cell Using Selective Epitaxial Vertical Channel Mos Selector Transistor App 20200127052 - Walker; Andrew J. ; et al.	2020-04-23
Method of making a three dimensional perpendicular magnetic tunnel junction with thin-film transistor Grant 10,629,649 - Kim , et al.	2020-04-21
High Density Mram Integration App 20200013827 - Kim; Kuk-Hwan ; et al.	2020-01-09
High Density Mram Integration App 20200013828 - Kim; Kuk-Hwan ; et al.	2020-01-09
Three Dimensional Perpendicular Magnetic Tunnel Junction With Thin Film Transistor Array App 20190355896 - Kim; Kuk-Hwan ; et al.	2019-11-21
Methods of forming perpendicular magnetic tunnel junction memory cells having vertical channels Grant 10,468,293 - Kim , et al. No	2019-11-05
Perpendicular magnetic tunnel junction memory cells having shared source contacts Grant 10,460,778 - Kim , et al. Oc	2019-10-29
Annular vertical Si etched channel MOS devices Grant 10,438,999 - Sharma , et al. O	2019-10-08
Steep slope field-effect transistor (FET) for a perpendicular magnetic tunnel junction (PMTJ) Grant 10,355,046 - Kim , et al. July 16, 2	2019-07-16
Three dimensional perpendicular magnetic junction with thin-film transistor Grant 10,355,045 - Kim , et al. July 16, 2	2019-07-16
Fabrication methods of forming annular vertical SI etched channel MOS devices Grant 10,355,047 - Sharma , et al. July 16, 2	2019-07-16
Fabrication Of A Perpendicular Magnetic Tunnel Junction (pmtj) Using Block Copolymers App 20190214551 - Kim; Kuk-Hwan ; et al.	2019-07-11
Cylindrical vertical SI etched channel 3D switching devices Grant 10,347,311 - Sharma , et al. July 9, 2	2019-07-09
Fabrication methods of forming cylindrical vertical SI etched channel 3D switching devices Grant 10,347,822 - Sharma , et al. July 9, 2	2019-07-09
Vertically-strained Silicon Device For Use With A Perpendicular Magnetic Tunnel Junction (pmtj) App 20190206940 - Kim; Kuk-Hwan ; et al.	2019-07-04
Fabrication Methods Of Forming Cylindrical Vertical Si Etched Channel 3d Switching Devices App 20190207081 - Sharma; Gian ; et al.	2019-07-04
Methods Of Forming Perpendicular Magnetic Tunnel Junction Memory Cells Having Vertical Channels App 20190206941 - Kim; Kuk-Hwan ; et al.	2019-07-04
Vertical Compound Semiconductor For Use With A Perpendicular Magnetic Tunnel Junction (pmtj) App 20190207098 - Kim; Kuk-Hwan ; et al.	2019-07-04
Cylindrical Vertical Si Etched Channel 3d Switching Devices App 20190206461 - Sharma; Gian ; et al.	2019-07-04
Method Of Making A Three Dimensional Perpendicular Magnetic Tunnel Junction With Thin-film Transistor App 20190206932 - Kim; Kuk-Hwan ; et al.	2019-07-04
Methods Of Forming Perpendicular Magnetic Tunnel Junction Memory Cells Having Vertical Channels App 20190206716 - Kim; Kuk-Hwan ; et al.	2019-07-04
Perpendicular Magnetic Tunnel Junction Memory Cells Having Shared Source Contacts App 20190206463 - Kim; Kuk-Hwan ; et al.	2019-07-04
Three Dimensional Perpendicular Magnetic Junction With Thin-film Transistor App 20190206934 - Kim; Kuk-Hwan ; et al.	2019-07-04
Vertical Steep-Slope Field-Effect Transistor (I-MOSFET) with Offset Gate Electrode for Driving a Perpendicular Magnetic Tunnel J App 20190206935 - Kim; Kuk-Hwan ; et al.	2019-07-04
Annular Vertical Si Etched Channel Mos Devices App 20190206938 - Sharma; Gian ; et al.	2019-07-04
Fabrication Methods Of Forming Annular Vertical Si Etched Channel Mos Devices App 20190206937 - Sharma; Gian ; et al.	2019-07-04
Perpendicular Magnetic Tunnel Junction Memory Cells Having Vertical Channels App 20190207024 - Kim; Kuk-Hwan ; et al.	2019-07-04
Fabrication of a perpendicular magnetic tunnel junction (PMTJ) using block copolymers Grant 10,333,063 - Kim , et al.	2019-06-25
Steep slope field-effect transistor (FET) for a perpendicular magnetic tunnel junction (PMTJ) Grant 10,243,021 - Kim , et al.	2019-03-26
Buried tap for a vertical transistor used with a perpendicular magnetic tunnel junction (PMTJ) Grant 10,186,551 - Kim , et al. Ja	2019-01-22
Independent vertical-gate 3-D NAND memory circuit Grant 9,953,995 - Walker April 24, 2	2018-04-24
Monolithic 3-d Dynamic Memory And Method App 20170278858 - Walker; Andrew J. ; et al.	2017-09-28
Independent Vertical-gate 3-d Nand Memory Circuit App 20170025437 - Walker; Andrew J.	2017-01-26
Non-volatile Memory Devices With Thin-film And Mono-crystalline Silicon Transistors App 20160099355 - Walker; Andrew J.	2016-04-07
ESD protection device with charge collections regions Grant 8,737,027 - Walker May 27, 2	2014-05-27
Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states Grant 8,637,366 - Herner , et al. January 28, 2	2014-01-28
Voltage protection device Grant 8,278,684 - Walker , et al. October 2, 2	2012-10-02
Dense Arrays And Charge Storage Devices App 20120223380 - Lee; Thomas H. ; et al.	2012-09-06
Dense Arrays And Charge Storage Devices App 20110156044 - Lee; Thomas H. ; et al.	2011-06-30
Method for forming doped polysilicon via connecting polysilicon layers Grant 7,915,163 - Konevecki , et al. March 29, 2	2011-03-29
Method for forming doped polysilicon via connecting polysilicon layers Grant 7,915,164 - Konevecki , et al. March 29, 2	2011-03-29
Method For Forming Doped Polysilicon Via Connecting Polysilicon Layers App 20110021019 - Konevecki; Michael W. ; et al.	2011-01-27
Circuits providing ESD protection to high voltage laterally diffused metal oxide semiconductor (LDMOS) transistors Grant 7,838,937 - Walker , et al. November 23, 2	2010-11-23
Dual-gate device Grant 7,777,268 - Walker August 17, 2	2010-08-17
Dual-gate device Grant 7,777,269 - Walker August 17, 2	2010-08-17
Stacked Dual-gate Nmos Devices With Antimony Source-drain Regions And Methods For Manufacturing Thereof App 20100140679 - Walker; Andrew J.	2010-06-10
Silicon controlled rectifier electrostatic discharge clamp for a high voltage laterally diffused MOS transistor Grant 7,659,558 - Walker , et al. February 9, 2	2010-02-09
Nonvolatile memory with backplate Grant 7,638,836 - Walker December 29, 2	2009-12-29
Two mask floating gate EEPROM and method of making Grant 7,615,436 - Kouznetsov , et al. November 10, 2	2009-11-10
Dual-gate device and method Grant 7,612,411 - Walker November 3, 2	2009-11-03
Method For Forming Doped Polysilicon Via Connecting Polysilicon Layers App 20090258462 - Konevecki; Michael W. ; et al.	2009-10-15
Dual-gate Memory Device With Channel Crystallization For Multiple Levels Per Cell (mlc) App 20090191680 - Walker; Andrew J.	2009-07-30
Doped polysilicon via connecting polysilicon layers Grant 7,566,974 - Konevecki , et al. July 28, 2	2009-07-28
Dense arrays and charge storage devices App 20090173985 - Lee; Thomas H. ; et al.	2009-07-09
TFT mask ROM and method for making same Grant 7,525,137 - Walker , et al. April 28, 2	2009-04-28
Dual-gate Memory Device With Channel Crystallization For Multiple Levels Per Cell (mlc) App 20090090913 - Walker; Andrew J.	2009-04-09
Retention Improvement In Dual-gate Memory App 20090087973 - Walker; Andrew J.	2009-04-02
Erase Method In Thin Film Nonvolatile Memory App 20090080258 - Walker; Andrew J.	2009-03-26
Memory array incorporating mirrored NAND strings and non-shared global bit lines within a block Grant 7,508,714 - Fasoli , et al. March 24, 2	2009-03-24
Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same Grant 7,505,321 - Scheuerlein , et al. March 17, 2	2009-03-17
Methods to Prevent Program Disturb in Nonvolatile Memory App 20090067246 - Walker; Andrew J.	2009-03-12
Dual-gate device and method Grant 7,495,337 - Walker , et al. February 24, 2	2009-02-24
Dual-gate Device And Method App 20080318380 - Walker; Andrew J.	2008-12-25
Dual-gate Device And Method App 20080315294 - Walker; Andrew J.	2008-12-25
Dual-gate device and method Grant 7,462,521 - Walker , et al. December 9, 2	2008-12-09
Dual-gate semiconductor devices with enhanced scalability Grant 7,459,755 - Walker December 2, 2	2008-12-02
Nonvolatile Memory With Backplate App 20080286925 - Walker; Andrew J.	2008-11-20
Nonvolatile Memory With Backplate App 20080285349 - Walker; Andrew J.	2008-11-20
Dual-gate Nmos Devices With Antimony Source-drain Regions And Methods For Manufacturing Thereof App 20080283921 - Walker; Andrew J.	2008-11-20
Nonvolatile Memory With Multiple Bits Per Cell App 20080283901 - Walker; Andrew J.	2008-11-20
NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same Grant 7,433,233 - Chen , et al. October 7, 2	2008-10-07
Dual-gate device and method Grant 7,410,845 - Walker August 12, 2	2008-08-12
Dual-gate Device And Method App 20080084745 - Walker; Andrew J.	2008-04-10
Dual-gate Memory Device And Optimization Of Electrical Interaction Between Front And Back Gates To Enable Scaling App 20080083943 - Walker; Andrew J.	2008-04-10
Dual-gate nonvolatile memory and method of program inhibition Grant 7,339,821 - Walker March 4, 2	2008-03-04
Dual-gate semiconductor devices with enhanced scalability App 20070284621 - Walker; Andrew J.	2007-12-13
Nand Memory Array Incorporating Capacitance Boosting Of Channel Regions In Unselected Memory Cells And Method For Operation Of Same App 20070242511 - Chen; En-Hsing ; et al.	2007-10-18
Memory Array Incorporating Memory Cells Arranged In Nand Strings App 20070217263 - Fasoli; Luca G. ; et al.	2007-09-20
TFT mask ROM and method for making same Grant 7,250,646 - Walker , et al. July 31, 2	2007-07-31
NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same Grant 7,233,522 - Chen , et al. June 19, 2	2007-06-19
Nonvolatile memory and method of program inhibition App 20070133286 - Walker; Andrew J.	2007-06-14
Dual-gate Device And Method App 20070126033 - Walker; Andrew J. ; et al.	2007-06-07
Junction diode comprising varying semiconductor compositions Grant 7,224,013 - Herner , et al. May 29, 2	2007-05-29
Memory array incorporating memory cells arranged in NAND strings Grant 7,221,588 - Fasoli , et al. May 22, 2	2007-05-22
Dual-gate Device And Method App 20070099381 - Walker; Andrew J.	2007-05-03
Dual-gate device and method App 20070029618 - Walker; Andrew J.	2007-02-08
TFT mask ROM and method for making same App 20060249735 - Walker; Andrew J. ; et al.	2006-11-09
Semiconductor device with localized charge storage dielectric and method of making same Grant 7,132,335 - Ilkbahar , et al. November 7, 2	2006-11-07
Dense arrays and charge storage devices Grant 7,129,538 - Lee , et al. October 31, 2	2006-10-31
Dual-gate device and method App 20060115939 - Walker; Andrew J. ; et al.	2006-06-01
Doped polysilicon via connecting polysilicon layers App 20060071074 - Konevecki; Michael W. ; et al.	2006-04-06
Junction diode comprising varying semiconductor compositions App 20060073657 - Herner; S. Brad ; et al.	2006-04-06
NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same Grant 7,023,739 - Chen , et al. April 4, 2	2006-04-04
Storage layer optimization of a nonvolatile memory device Grant 7,012,299 - Mahajani , et al. March 14, 2	2006-03-14
Method for fabricating programmable memory array structures incorporating series-connected transistor strings Grant 7,005,350 - Walker , et al. February 28, 2	2006-02-28
Rail stack array of charge storage devices and method of making same Grant 6,992,349 - Lee , et al. January 31, 2	2006-01-31
Formation of thin channels for TFT devices to ensure low variability of threshold voltages Grant 6,960,794 - Walker , et al. November 1, 2	2005-11-01
High density 3d rail stack arrays and method of making Grant 6,940,109 - Patel , et al. September 6, 2	2005-09-06
Nand memory array incorporating multiple series selection devices and method for operation of same App 20050128807 - Chen, En-Hsing ; et al.	2005-06-16
NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same App 20050122780 - Chen, En-Hsing ; et al.	2005-06-09
Memory array incorporating memory cells arranged in NAND strings App 20050122779 - Fasoli, Luca G. ; et al.	2005-06-09
Two mask floating gate EEPROM and method of making Grant 6,897,514 - Kouznetsov , et al. May 24, 2	2005-05-24
Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication Grant 6,888,750 - Walker , et al. May 3, 2	2005-05-03
Monolithic three dimensional array of charge storage devices containing a planarized surface Grant 6,881,994 - Lee , et al. April 19, 2	2005-04-19
Semiconductor device with localized charge storage dielectric and method of making same App 20050079675 - Ilkbahar, Alper ; et al.	2005-04-14
TFT mask ROM and method for making same App 20050070060 - Walker, Andrew J. ; et al.	2005-03-31
Storage layer optimization of a nonvolatile memory device App 20050062098 - Mahajani, Maitreyee ; et al.	2005-03-24
Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states App 20050052915 - Herner, S. Brad ; et al.	2005-03-10
Thin film transistor with metal oxide layer and method of making same Grant 6,858,899 - Mahajani , et al. February 22, 2	2005-02-22
Semiconductor device with localized charge storage dielectric and method of making same Grant 6,849,905 - Ilkbahar , et al. February 1, 2	2005-02-01
TFT mask ROM and method for making same Grant 6,841,813 - Walker , et al. January 11, 2	2005-01-11
Inverted staggered thin film transistor with salicided source/drain structures and method of making same Grant 6,815,781 - Vyvoda , et al. November 9, 2	2004-11-09
Rail stack array of charge storage devices and method of making same App 20040214379 - Lee, Thomas H. ; et al.	2004-10-28
Two mask floating gate EEPROM and method of making App 20040207001 - Kouznetsov, Igor G. ; et al.	2004-10-21
Dense arrays and charge storage devices App 20040206996 - Lee, Thomas H. ; et al.	2004-10-21
High density 3d rail stack arrays and method of making App 20040159860 - Patel, Kedar ; et al.	2004-08-19
NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same App 20040145024 - Chen, En-Hsing ; et al.	2004-07-29
Formation of thin channels for TFT devices to ensure low variability of threshold voltages App 20040124415 - Walker, Andrew J. ; et al.	2004-07-01
Method For Fabricating Programmable Memory Array Structures Incorporating Series-connected Transistor Strings App 20040124466 - Walker, Andrew J. ; et al.	2004-07-01
Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same App 20040125629 - Scheuerlein, Roy E. ; et al.	2004-07-01
Semiconductor device with localized charge storage dielectric and method of making same App 20040119122 - Ilkbahar, Alper ; et al.	2004-06-24
High density 3D rail stack arrays Grant 6,737,675 - Patel , et al. May 18, 2	2004-05-18
Thin film transistor with metal oxide layer and method of making same App 20040069990 - Mahajani, Maitreyee ; et al.	2004-04-15
Inverted staggered thin film transistor with salicided source/drain structures and method of making same App 20040036124 - Vyvoda, Michael A. ; et al.	2004-02-26
High density 3D rail stack arrays and method of making App 20040000679 - Patel, Kedar ; et al.	2004-01-01
Gate dielectric structures for integrated circuits and methods for making and using such gate dielectric structures App 20030155582 - Mahajani, Maitreyee ; et al.	2003-08-21
Thin film transistors with vertically offset drain regions Grant 6,593,624 - Walker July 15, 2	2003-07-15
Thin film transistors with vertically offset drain regions App 20030057435 - Walker, Andrew J.	2003-03-27
TFT mask ROM and method for making same App 20030030074 - Walker, Andrew J. ; et al.	2003-02-13
Two mask floating gate EEPROM and method of making App 20020142546 - Kouznetsov, Igor G. ; et al.	2002-10-03
Dense arrays and charge storage devices, and methods for making same App 20020028541 - Lee, Thomas H. ; et al.	2002-03-07
Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication App 20010055838 - Walker, Andrew J. ; et al.	2001-12-27
Semiconductor device having a nonvolatile memory cell in which the floating gate is charged with hot charge carriers at the source side Grant 5,828,099 - Van Dort , et al. October 27, 1	1998-10-27