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Patent applications and USPTO patent grants for Waldrop; William Chad.The latest application filed is for "reset speed modulation circuitry for a decision feedback equalizer of a memory device".
Patent | Date |
---|---|
Reset Speed Modulation Circuitry For A Decision Feedback Equalizer Of A Memory Device App 20220262413 - Waldrop; William Chad ;   et al. | 2022-08-18 |
Reset speed modulation circuitry for a decision feedback equalizer of a memory device Grant 11,417,374 - Waldrop , et al. August 16, 2 | 2022-08-16 |
Centralized Dfe Reset Generator For A Memory Device App 20210319826 - Waldrop; William Chad ;   et al. | 2021-10-14 |
Centralized DFE reset generator for a memory device Grant 11,145,353 - Waldrop , et al. October 12, 2 | 2021-10-12 |
Pre-driver logic Grant 7,898,294 - Waldrop , et al. March 1, 2 | 2011-03-01 |
Pre-driver Logic App 20100156463 - Waldrop; William Chad ;   et al. | 2010-06-24 |
Pre-driver logic Grant 7,675,324 - Waldrop , et al. March 9, 2 | 2010-03-09 |
Pre-driver Logic App 20090153191 - WALDROP; WILLIAM CHAD ;   et al. | 2009-06-18 |
Time domain bridging circuitry for use in determining output enable timing App 20070008758 - Waldrop; William Chad | 2007-01-11 |
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