loadpatents
name:-0.016209125518799
name:-0.018357038497925
name:-0.00092482566833496
Wakayama; Shigetoshi Patent Filings

Wakayama; Shigetoshi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wakayama; Shigetoshi.The latest application filed is for "design support program, design support system, and design support method".

Company Profile
0.15.10
  • Wakayama; Shigetoshi - Yokohama N/A JP
  • Wakayama; Shigetoshi - Kawasaki JP
  • Wakayama, Shigetoshi - Kawasaki-shi JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Support program, design support system, and design support method
Grant 8,468,481 - Nozawa , et al. June 18, 2
2013-06-18
Phase interpolator for a timing signal generating circuit
Grant 8,065,553 - Tamura , et al. November 22, 2
2011-11-22
Design Support Program, Design Support System, And Design Support Method
App 20110041113 - NOZAWA; Toshiharu ;   et al.
2011-02-17
Semiconductor device having a guard ring
Grant 7,642,624 - Wakayama , et al. January 5, 2
2010-01-05
Timing Signal Generating Circuit, Semiconductor Integrated Circuit Device and Semiconductor Integrated Circuit System to which the Timing Signal Generating Circuit is Applied, and Signal Transmission System
App 20090195281 - Tamura; Hirotaka ;   et al.
2009-08-06
Timing signal generating circuit with a master circuit and slave circuits
Grant 7,496,781 - Tamura , et al. February 24, 2
2009-02-24
Semiconductor device including capacitor having decoupling capacity
Grant 7,342,434 - Wakayama , et al. March 11, 2
2008-03-11
Semiconductor device having a guard ring
App 20070257371 - Wakayama; Shigetoshi ;   et al.
2007-11-08
Semiconductor device having a guard ring
Grant 7,256,474 - Wakayama , et al. August 14, 2
2007-08-14
Semiconductor integrated circuit and evaluation method of wiring in the same
Grant 7,106,108 - Igeta , et al. September 12, 2
2006-09-12
Data transfer circuit between different clock regions
Grant 7,096,375 - Wakayama , et al. August 22, 2
2006-08-22
Semiconductor device
App 20060061409 - Wakayama; Shigetoshi ;   et al.
2006-03-23
Semiconductor integrated circuit and evaluation method of wiring in the same
App 20050144546 - Igeta, Mitsuaki ;   et al.
2005-06-30
Semiconductor device having a guard ring
App 20040188843 - Wakayama, Shigetoshi ;   et al.
2004-09-30
Data transfer circuit between different clock regions
App 20030112051 - Wakayama, Shigetoshi ;   et al.
2003-06-19
Signal Transmission System For Transmitting Signals Between Lsi Chips, Receiver Circuit For Use In The Signal Transmission System, And Semiconductor Memory Device Applying The Signal Transmission System
Grant 6,493,394 - Tamura , et al. December 10, 2
2002-12-10
Signal transmission system having a timing adjustment circuit
Grant 6,484,268 - Tamura , et al. November 19, 2
2002-11-19
Signal transmission system for transmitting signals between LSI chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system
App 20020080883 - Tamura, Hirotaka ;   et al.
2002-06-27
Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system
App 20010007136 - Tamura, Hirotaka ;   et al.
2001-07-05
Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system
Grant 6,247,138 - Tamura , et al. June 12, 2
2001-06-12
Destructive read type memory circuit, restoring circuit for the same and sense amplifier
App 20010002178 - Wakayama, Shigetoshi ;   et al.
2001-05-31
Destructive read type memory circuit, restoring circuit for the same and sense amplifier
Grant 6,205,076 - Wakayama , et al. March 20, 2
2001-03-20
Signal transmission system for transmitting signals between LSI chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system
Grant 6,157,688 - Tamura , et al. December 5, 2
2000-12-05
Phase-locked loop circuit permitting reduction of circuit size
Grant 6,064,244 - Wakayama , et al. May 16, 2
2000-05-16

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