Waite; Andrew M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Waite; Andrew M..The latest application filed is for "asymmetric gate spacer formation using multiple ion implants".

Company Profile

3.21.17

Waite; Andrew M. - Beverly MA
Waite; Andrew M. - Hopewell Junction NY
Waite; Andrew M. - Hopeful Junction NY
Waite; Andrew M. - Radebeul/Dresden DE
WAITE; Andrew M. - Radebeul DE
Waite; Andrew M. - Wappingers Falls NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Asymmetric gate spacer formation using multiple ion implants Grant 10,896,855 - Waite January 19, 2	2021-01-19
Asymmetric Gate Spacer Formation Using Multiple Ion Implants App 20200388541 - Waite; Andrew M.	2020-12-10
Techniques and structure for forming thin silicon-on-insulator materials Grant 10,600,675 - Waite , et al.	2020-03-24
Etch rate modulation through ion implantation Grant 10,332,748 - Prasad , et al.	2019-06-25
Techniques and Structure for Forming Thin Silicon-on-Insulator Materials App 20190027396 - Waite; Andrew M. ; et al.	2019-01-24
Etch Rate Modulation Through Ion Implantation App 20180182636 - Prasad; Rajesh ; et al.	2018-06-28
Etch rate modulation through ion implantation Grant 9,934,982 - Prasad , et al. April 3, 2	2018-04-03
Etch Rate Modulation Through Ion Implantation App 20170178914 - Prasad; Rajesh ; et al.	2017-06-22
Masking for high temperature implants Grant 9,679,776 - Waite , et al. June 13, 2	2017-06-13
Masking For High Temperature Implants App 20170025277 - Waite; Andrew M. ; et al.	2017-01-26
Ion implant for defect control Grant 9,299,564 - Waite , et al. March 29, 2	2016-03-29
Techniques For Ion Implantation Of Narrow Semiconductor Structures App 20150214339 - WAITE; ANDREW M. ; et al.	2015-07-30
Method of doping a polycrystalline transistor channel for vertical NAND devices Grant 9,018,064 - Waite , et al. April 28, 2	2015-04-28
Barrier Layer For Electrostatic Chucks App 20150062772 - Waite; Andrew M. ; et al.	2015-03-05
Method Of Doping A Polycrystalline Transistor Channel For Vertical NAND Devices App 20150017772 - Waite; Andrew M. ; et al.	2015-01-15
Method of implanting high aspect ratio features Grant 8,846,508 - England , et al. September 30, 2	2014-09-30
Ion Implant For Defect Control App 20140162435 - Waite; Andrew M. ; et al.	2014-06-12
MOSFET with asymmetrical extension implant Grant 8,193,592 - Yang , et al. June 5, 2	2012-06-05
Stressed field effect transistor and methods for its fabrication Grant 8,148,214 - Waite , et al. April 3, 2	2012-04-03
Strain enhanced semiconductor devices and methods for their fabrication Grant 8,124,473 - Pan , et al. February 28, 2	2012-02-28
Methods for fabricating stressed MOS devices Grant 7,977,180 - Waite , et al. July 12, 2	2011-07-12
Mosfet With Asymmetrical Extension Implant App 20110024841 - YANG; Frank Bin ; et al.	2011-02-03
MOSFET with asymmetrical extension implant Grant 7,829,401 - Yang , et al. November 9, 2	2010-11-09
Methods For Fabricating Stressed Mos Devices App 20100144105 - Waite; Andrew M. ; et al.	2010-06-10
Mosfet With Asymmetrical Extension Implant App 20090283806 - YANG; Frank Bin ; et al.	2009-11-19
Stressed Field Effect Transistor And Methods For Its Fabrication App 20090130803 - WAITE; Andrew M. ; et al.	2009-05-21
Methods for fabricating a stress enhanced semiconductor device having narrow pitch and wide pitch transistors Grant 7,521,380 - Waite , et al. April 21, 2	2009-04-21
Stressed field effect transistor and methods for its fabrication Grant 7,504,301 - Waite , et al. March 17, 2	2009-03-17
Methods For Fabricating A Stress Enhanced Semiconductor Device Having Narrow Pitch And Wide Pitch Transistors App 20080261408 - WAITE; Andrew M. ; et al.	2008-10-23
Strain Enhanced Semiconductor Devices And Methods For Their Fabrication App 20080251851 - PAN; James N. ; et al.	2008-10-16
Stressed Field Effect Transistor And Methods For Its Fabrication App 20080079033 - Waite; Andrew M. ; et al.	2008-04-03
Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device Grant 7,235,433 - Waite , et al. June 26, 2	2007-06-26
Multi-channel transistor with tunable hot carrier effect Grant 7,224,007 - Pan , et al. May 29, 2	2007-05-29
Method and arrangement for reducing source/drain resistance with epitaxial growth Grant 7,183,169 - Waite , et al. February 27, 2	2007-02-27
Method for offsetting a silicide process from a gate electrode of a semiconductor device Grant 7,179,745 - Waite , et al. February 20, 2	2007-02-20
Method for removing a cap from the gate of an embedded silicon germanium semiconductor device Grant 7,157,374 - Waite , et al. January 2, 2	2007-01-02
Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device App 20060091427 - Waite; Andrew M. ; et al.	2006-05-04
Integrated circuit and method for its manufacture Grant 6,972,478 - Waite , et al. December 6, 2	2005-12-06

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